TS3A27518E: Issues connecting high speed uSD to Nikon cameras at 100MHz clock

Part Number: TS3A27518E

We are trying to utilise a TS3A27518E to switch a uSD card (com channel) between either our own controller (NC channel) or a camera's SD slot (NO channel) so that we can read photos back from the SD card when required.

With slower uSD Class 4 cards, everything works fine for a variety of cameras (and a clock speed of up to 50MHz) proving that the hardware connections are fine. However, for HC-I bus cards, the circuit is failing when it tries to switch clock/data lines from 3.6v to 1.8V and ramp up the clock speed to 100MHz. Although the tracks are short and a ground plane is used, my guess is there is too much parasitic capacitance as viewing the clock signal shows that the clock sometimes has a reduced amplitude of 1.0v (down from 1.8v) and also has a DC bias. I was considering using a low forward voltage schottky diode to remove the DC bias but this will also introduce a phase delay that I suspect would be too much at 100MHz.  Has anyone had any success in using this type of switch for low voltage (1.8V) and high speed (100MHz) SD signals? I was wondering if I should have used two TS3A44159 devices instead as that has a lower R(on) of 0.3 ohms.

Although the circuit board allows for pull-ups, no pull-up or pull-down resistors are used on the data lines.

RHS screenshot: Ch1 is input to switch, Ch3 is the output.

  

Appreciate any ideas anyone might have to resolve this.

Thanks!!

Paul

11 Replies

  • Hi Paul,

    Your schematic is very helpful for me to understand what you want to achieve at the system level. I have not found any show stoppers gating you not to use TS3A27518E. However, I will appreciate if you can walk me through the messages you want us to know from your two oscilloscope's screenshots. For example, what are the input and output signals you would expect to see and what is the timing sequence you are controlling?


    Here are 3 thoughts.

    1. Ron should not matter between TS3A27518E and TS3A44159 because your pull up resistor is 47K and the Ron of both devices is insignificant

    2. I am more curious the root cause of the DC bias added on your clock lines. To me, it should not exist.

    3. If you are really concerned about the signal bandwidth, I would like to know how far you put two SD card slots and your microcontroller.

    Fan Wang

  • In reply to Fan.Wang:

    Hi Fan,

    The top screenshot has two traces with both being measured at the uSD Skt. Ch 1 is Dat2 whereas Ch3 is the CLK.
    The bottom screenshot also has two traces. Both are the CLK. Ch3 is the same as the top screenshot but Ch1 is the CLK input to the TS3A27518E.

    I think the DC bias is caused by the stray capacitance and the input resistance smoothing out the square wave. At lower frequencies this isn't an issue but at the higher frequencies (100MHz) the clock is changing logic state before the signal at the TS3A27518E reaches the required logic levels.
    Please note that I haven't got the 47K pullups installed. I did try them to see what effect they would have but no definite benefit was measured.

    Track resistance into Sw is calculated to be about 48 mOhm. I am using a 4 layer PCB (Top, Gnd, Pwr, Bottom).

    Appreciate your thoughts
  • In reply to Paul Deroon:

    FYI, here are also the PCB layers from top to bottom:

  • In reply to Paul Deroon:

    Thanks, Paul. Your stack arrangement looks good to me. I think what we can focus on is why the clock signal corrupted. It looks very strange to me. I don't think it relates to the analog performance on the signal path. It looks to me as digital control or handshake issue from the transmitter/micro-controller side.

    DC bias is more analog issue, but I bet we can fix that later and really quickly. 

    Fan Wang

  • In reply to Fan.Wang:

    Hi Fan,

    I had also tried using my boards in the Nikon cameras, with the TS3A27518E bypassed. In the first instance I used a bare bones board with only the uSD socket, a VCC link and then 10 ohm resistors across where the switch IC would be. In the second instance I removed the switch IC from an assembled board and bypassed it with ribbon cable. Please refer to the pic below demonstrating this.

    In both instances, the clock signal was unclipped with no DC offset at 100 MHz (trace 3 in the lower photo).

    Any other thoughts on what I can try?

  • In reply to Paul Deroon:

    I should have mentioned that with both of the boards that had the TS3A27518E bypassed, the Nikon camera was taking photos without any issues
    (clock frequency 100MHz). Happy to send you a board if you want one to have a play with.
  • In reply to Paul Deroon:

    Any more thoughts Fan (or anyone else)?

  • In reply to Paul Deroon:

    Hi Paul,

    I reviewed your experiment results and I have a question regarding TS3A27518E not being bypassed. Can you walk me through the voltage swing of that clipped signal is supposed to be and the supply voltage of TS3A27518E of the clipping moment?

    Fan Wang

  • In reply to Fan.Wang:

    Hi Fan, thanks for following up on this. Not sure exactly which picture you are referring to. Can you tell me the date it was initially posted? Is it the one you reposted back on the 26th showing the full SD Dat2 signal and the CLK pulses? If so, the area that is circled and labeled as the point of failure is the point at which the data and clock lines switch up in speed and the magnitude changes to 50% (ie, about 1.8V P-P). This is what is should do so that in itself is not an issue. However, when it is at the higher CLK frequency it drops out. The supply rail stays at 3.6V DC. Is that what you were asking??

    Paul
  • In reply to Paul Deroon:

    Hi Paul,

    It seems the supply is not an concern even when you tune up the frequency. The supply stays at 3.6V DC. Some people might suspect the bandwidth sufficiency of your system at high frequency, but Ron of this device is only 4Ohms. I recently tested a 10Ohm switch with nano Farad capacitive loading. The signal edging looks great. I believe in your system, the capacitive loading is much lower than nano Farad level. And TS3A27518E has lower Ron. I just want to share with you some ideas. I might be wrong, but I would think it's unlikely due to the bandwidth.

    Fan Wang