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  • TI Thinks Resolved

TS3DV642: Displayport MUX biasing for KVM configuration (2 DP connectors in, 1DP out)

Part Number: TS3DV642

I'm currently prototyping a KVM with the TS3DV642 differential 2:1/1:2 MUX. It's intended to switch between two DisplayPort connector inputs out to one connector.

My question is, how should this connection be biased and ac coupled?

The datasheet specifies a need for around 1V bias conditions on the input, due to the FETs not being suitable for rapid negative swings. The following is their application note diagram for usage in a notebook embedded on the same board as the graphics card.

Above they have the convenience of making use of the DisplayPort biasing conditions before the graphics card ad couples the output (something a KVM can't leverage, as an external peripheral between source and sink connections!)

Bellow is the DisplayPort spec for the MainLink and AUX lines.

In my PCB design, I assumed that I could omit any ac coupling capacitors, and make use of the sink device biasing for MainLink connections (Vbias = 2V), and the source device biasing for AUX. This doesn't seem to work, and I don't have a +1GHz scope lying around to debug the board. I'm certain the differential signaling is properly laid out (intra/inter-pair skew is within spec, ground plane is unbroken, proper trace widths, etc..). I'm getting no signal out to the monitor (black screen on both inputs).

How would one properly bias this chip to use it as a KVM? Are there other issues that might make the implementation fail?

  • Hello Jamie,

    A support engineer has been assigned and you should be getting a response soon.

    Regards,
    Jorge
  • In reply to Jorge Llamas (SWAT):

    Hello Jamie

    Sorry for the delay, we are still working on it. Thank you for your patient.

    Regards
    Francisco
  • In reply to Francisco Javier Zamudio:

    Hello Jamie

    The device can support analog I/O signal in 0 to 5 V range. TS3DV642 also has a special feature that prevents the device from back-powering when the VCC supply is not available and an analog signal is applied on the I/O pin. In this situation, this special feature prevents leakage current in the device. The TS3DV642 is not designed for passing signals with negative swings; the high-speed signals need to be
    properly DC-biased (usually ~1 V) before being passed to the TS3DV642.
    Can you share the schematic of your application? Could be useful to take a look at it.

    Regards
    Francisco
  • In reply to Francisco Javier Zamudio:

    Hi Francisco,

    Thanks for your reply. Here is my schematic. Note that this shows decoupling capacitors on the differential lines (ML & AUX) of the sink and source side. I have tried the design with and without these decoupling capacitors present. As stated above, for the attempt with no coupling capacitors, I was intending to rely on the biasing conditions of the source device for AUX, and sink device for ML guaranteed by the DisplayPort specification (2V).

  • In reply to Jamie Stepanian:

    Hello Jamie

    Apologize for my delay.
    As I said in my last comment, this device is not designed for passing signals with negative swings, the high-speed signals need to be properly DC biased before being passed to the device. With the AC coupling capacitors, you will delete the DC component. Please, take a look at the application and implementation section on the datasheet.

    Regards
    Francisco

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