Part Number: TS3A27518E-Q1
My customer has asked us for the output resistance for the NC and NO pins when they are turned off. I did see that isolation graph on the datasheet, but do we have an approximate value for the output resistance in the off state?
The off state resistance for a passive FET switch can be calculated by the off leakage current specs in the datasheet for a DC signal. You can use the max voltage placed on the signal path divided by the current through the switch to get the resistance of the signal path in the off state.
This post has an example calculation of the off resistance.
For AC signal you need to look at the off isolation since the signal path will impedance will be lower at higher frequencies.
In reply to Adam Torma:
In reply to Diego Lewis:
These types of signal switches are passive FET switches and do not have any drive capability sourcing or sinking current. The trace length calculations will need to based on your transmitter strength and your receiver sensitivity.
There is more information on how these pass FETs work in this e2e thread
This application note is also useful in the basics of passive FET switches.
Do you know what parts are driving and receiving the data? What protocol are they using?
Thank you for the last link and information Adam.
My customer wants to know what is the smallest resistor they can use as a pull down to ground on the NC/NO pins when using 1.8V logic.
The NC/NO pins are the drain or source of a mosfet and placing a pull down of any size will not make any difference in just this circuit.
The pull down resistor on the signal path COM, NC, or NO will likely effect the other components in your system. Do you have a diagram with the other components in your system? What is the circuit driving the switch ( push pull, open drain, etc.)?
Thank you for the confirmation.
Another engineer using the same part wanted to know how should they handle the device during power on in order to keep the I/Os in high impedance.
Would a pull up from the EN to the VCC pin be sufficient?
The TS3A27518E has the powered off protection feature and will be Hi-Z when Vcc = 0 V.
TI recommends adding pull up or pull down resistors on the digital logic pins to prevent undesired conditions during power up. If you would like to remain Hi-Z during power up you should place the resistor to Vcc.
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