TS3L501E: PD pin of TS3L501E

yoshiki hasebe

Mastermind 6385 points

Part Number: TS3L501E

Dear Sirs,

My customer asked us about PD pin of TS3L501E.

Is there a problem if the PD terminal is set to HIGH under the following conditions?

１．VDD=0V、Vin=０V（That is, in a state where a voltage of HIGH is applied only to the PD pin.)

２．VDD=0V、Vin＞0V

　　We have confirmed that this condition is prescribed in the specification of Ioff on page 6 of the datasheet.

　　I also confirmed the following contents of E2E.

　　Here "Vin = 0 to 3.6 V" is typo.Is Vin = 3.6 V correct?

Please let me know about the above contents.

Best Regards,

Y. Hasebe

over 5 years ago

0 Adam Torma over 5 years ago

TI__Mastermind 45340 points

Yoshiki-san,

The TS3L501E will support up to 5.5 V on the digital control logic pins PD and SEL. This will hold true even if VDD= 0V and Vin > 0V.

There is a specification that measures the leakage with Vdd= 0V and Vin = 0 to 3.6 V.

Thank you,

Adam

0 yoshiki hasebe over 5 years ago in reply to Adam Torma

Mastermind 6385 points

Hello Adam-san,

Thank you for your reply.

I understood that the conditions of Ioff (VDD = 0 V, VIN = 0 to 3.6 V) are correct and the voltage supports 5.5 Vmax.

Then I have one more question.

If Ioff exceeds ± 1 μA, what are the possible symptoms of the device?

Please let me know above question.

Best Regards,

Y.Hasebe

0 Adam Torma over 5 years ago in reply to yoshiki hasebe

TI__Mastermind 45340 points

Yoshiki,

The Ioff spec cannot exceed +/- 1uA unless an increasingly large voltage is applied to the I/O pins which would be outside of the recommended operating conditions.

Thank you,
Adam

0 yoshiki hasebe over 5 years ago in reply to Adam Torma

Mastermind 6385 points

Hello Adam-san,

Thank you for your reply.

I understand your comment.

I will explain it to my customer.

Best Regards,

Y.Hasebe

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TS3L501E: PD pin of TS3L501E