CCS/66AK2E05: Failed to calibrate the circuit for ARM_A15 . The lowest clock setting is 302.32 Mhz which exceeds the maximum receiver frequency of 257.531 Mhz for ARM_A15

Hello,
I haven't seen this error before. I have escalated this issue to one of our emulation experts. I will let you know when I get any updates.

Thanks
ki

Feedback by one of the emulation experts:

"It may be possible that the gels for the 66AK2E05 device are configuring the PLLs such that the TPIU export clock is exceeding what the pro-trace can handle. Looking at the GELs for 66AK2E05 (.\ccsv8\ccs_base\emulation\boards\evmk2e\gel\evmk2e_arm.gel) there are a few options for configuring the PLLs for the device (i.e. CORE_PLL_INIT_100MHZ_to_614_28MHz() … CORE_PLL_INIT_100MHZ_to_1_35Gz()).

These functions eventually program the PLL1_DIV3 which should be what is setting the TPIU clock.  There is a gel that was created specifically for K2G that can be run from the DebugSS DAP to lower the TPIU clock.  It is located in .\ccsv8\ccs_base\emulation\gel\k2g_trace_util.gel.  This gel also seems to work for K2H so I’m guessing it will work for all Keystone 2 devices. "

Are you executing any GEL scripts which initialize the target as mentioned above? It was suggested to use a slower CORE_PLL_INIT function. Are you using an EVM or is this a custom board?

Thanks

ki

Hi Ki,

I am using an EVM. I tried PLLs configuration. I have some error. I share to below PLLs Configurations setting and PLLs error log.

Thank you so much!

/cfs-file/__key/communityserver-discussions-components-files/81/PLL_5F00_CONFIG_5F00_ERROR_5F00_LOG.txt

Ibrahim,

I noticed that you have the evmk2e_arm.gel set on the arm_A15_3 core.  The default gel setup for the 66AK2E05 places the evmk2e.gel from emulation\boards\evmk2e\gel on to the C66xx_0 core.  Can you try creating a new CCXML with the 66AK2E05 device?  This should set up the evmk2e.gel on the C66xx_0 core automatically.  After creating the new CCXML, please power cycle your EVM, start a debug session, connect to the C66xx_0 core and run Scripts->TCI66xx Functions->TETRIS_POWERUP_AND_PLL_INIT_100MHZ_1000MHz, and attempt to use PC Trace with ARM core. 

Thanks,

Mark

Hello,
I haven’t heard back from you, hence this issue is being closed. If you wish to continue the discussion, please post a reply with an update below (or create a new thread).

Thanks,
ki

Hi,

I can not still configurate PLLs and ı can not connect arm using 4GB DDR3 RAM . I get error.  I share to below and I can connect 2GB DDR3 RAM on arm with ProTrace. 

Thanks,

I checked with a colleague and he mentioned that the last error you see usually occurs when the TPIU clock is set too high for the board. Are you using a standard EVM or development board (i.e. EVMK2EX board) or is this a custom board? Are you running the standard gel scripts?

Also please describe the exact steps you are taking when you launch a debug session. Are you running any GEL actions under the scripts menu after you connect to the A15 and before your try to start a Trace session?

Thanks
ki

Hi,

I am using standard EVM 66AK2E05.

I am using XDS560v2 Pro Trace jtag with CCC 8.3.0 on Windows with using usb cable. I tried to run standard evmk2e_arm.gel but I did not connect to Pro Trace. This instant I don't run any gel scripts on the ARM Core. I share to below my target config setting and my all errors. My last error is failed to converge on stable ADC threshold. I shared to below too.

Thanks

İbrahim

Can you try specifying the evmk2e_arm.gel file for A15 core also?

I tried that but ı can not connect. I share to get my error.

Sorry for the delayed response on this. Please send me the *.ccxml file you are using. I will try to secure the same evm and try your target configuration file with CCSV8.3