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Compiler/TMDSIDK437X: AM437x

Aitbayeva Zhaniya
Prodigy 50 points
Part Number: TMDSIDK437X

Tool/software: TI C/C++ Compiler

Hello. I am trying to run HSR project on IDK_AM437x, and my connect target message is below :

IcePick_D_0: Error connecting to the target: (Error -151 @ 0x0) One of the FTDI driver functions used during the connect returned bad status or an error. The cause may be one or more of: no XDS100 is plugged in, invalid XDS100 serial number, blank XDS100 EEPROM, missing FTDI drivers, faulty USB cable. Use the xds100serial command-line utility in the 'common/uscif' folder to verify the XDS100 can be located. (Emulation package 6.0.407.3)
CortexA9: Output: **** AM437x IDK EVM Initialization is in progress ..........
CortexA9: Output: **** Device Type: GP
CortexA9: GEL Output: System input clock is 24MHz
CortexA9: GEL Output: **** AM43xx OPP100 with CLKIN=24MHz is in progress .........
CortexA9: GEL Output: **** Going to Bypass...
CortexA9: GEL Output: **** Bypassed, changing values...
CortexA9: Output: **** Locking PLL
CortexA9: GEL Output: **** MPU PLL locked
CortexA9: GEL Output: **** Core Bypassed
CortexA9: GEL Output: **** Now locking Core...
CortexA9: GEL Output: **** Core locked
CortexA9: GEL Output: **** Calculated PER SD Divisor=4
CortexA9: GEL Output: **** PER DPLL Bypassed
CortexA9: GEL Output: **** PER DPLL Locked
CortexA9: GEL Output: **** Calculated EXTDEV SD Divisor=4
CortexA9: GEL Output: **** EXTDEV DPLL Bypassed
CortexA9: GEL Output: **** EXTDEV DPLL Locked
CortexA9: GEL Output: **** DISP PLL Config is in progress ..........
CortexA9: GEL Output: **** DISP PLL Locked
CortexA9: GEL Output: **** DDR DPLL Bypassed
CortexA9: GEL Output: **** DDR DPLL Locked
CortexA9: GEL Output: **** Setting DDR3 = 400MHz
CortexA9: GEL Output: **** AM43xx OPP100 configuration is done .........
CortexA9: GEL Output: Starting DDR3 configuration...
CortexA9: Output: EMIF PRCM is in progress .......
CortexA9: Output: EMIF PRCM Done
CortexA9: GEL Output: EMIF CLK enabled...
CortexA9: GEL Output: Waiting for VTP Ready .......
CortexA9: GEL Output: VTP is Ready!
CortexA9: GEL Output: VTP controller enabled
CortexA9: GEL Output: Checking if DLL is ready...
CortexA9: GEL Output: DLL is ready
CortexA9: GEL Output: Configuring DDR IOs and Control Module registers...
CortexA9: GEL Output: Configuration of Control Module registers complete
CortexA9: GEL Output: Setting up DDR3 H/W leveling configuration...
CortexA9: GEL Output: Starting EMIF controller configuration...
CortexA9: GEL Output:

DDR3 Hardware leveling incomplete with errors !!!

CortexA9: GEL Output:

DDR3 CONFIGURATION FAILED!!! Could not read/write first DDR location.
CortexA9: GEL Output: Expected 0xA5A5A5A5, Read: 0x00000000

CortexA9: GEL Output: Turning on EDMA...
CortexA9: GEL Output: EDMA is turned on...
CortexA9: Output: **** AM437x IDK EVM Initialization is Done ******************


CortexA9: Output: **** AM437x IDK EVM Initialization is in progress ..........
CortexA9: Output: **** Device Type: GP
CortexA9: GEL Output: System input clock is 24MHz
CortexA9: GEL Output: **** AM43xx OPP100 with CLKIN=24MHz is in progress .........
CortexA9: GEL Output: **** Going to Bypass...
CortexA9: GEL Output: **** Bypassed, changing values...
CortexA9: Output: **** Locking PLL
CortexA9: GEL Output: **** MPU PLL locked
CortexA9: GEL Output: **** Core Bypassed
CortexA9: GEL Output: **** Now locking Core...
CortexA9: GEL Output: **** Core locked
CortexA9: GEL Output: **** Calculated PER SD Divisor=4
CortexA9: GEL Output: **** PER DPLL Bypassed
CortexA9: GEL Output: **** PER DPLL Locked
CortexA9: GEL Output: **** Calculated EXTDEV SD Divisor=4
CortexA9: GEL Output: **** EXTDEV DPLL Bypassed
CortexA9: GEL Output: **** EXTDEV DPLL Locked
CortexA9: GEL Output: **** DISP PLL Config is in progress ..........
CortexA9: GEL Output: **** DISP PLL Locked
CortexA9: GEL Output: **** DDR DPLL Bypassed
CortexA9: GEL Output: **** DDR DPLL Locked
CortexA9: GEL Output: **** Setting DDR3 = 400MHz
CortexA9: GEL Output: **** AM43xx OPP100 configuration is done .........
CortexA9: GEL Output: Starting DDR3 configuration...
CortexA9: Output: EMIF PRCM is in progress .......
CortexA9: Output: EMIF PRCM Done
CortexA9: GEL Output: EMIF CLK enabled...
CortexA9: GEL Output: Waiting for VTP Ready .......
CortexA9: GEL Output: VTP is Ready!
CortexA9: GEL Output: VTP controller enabled
CortexA9: GEL Output: Checking if DLL is ready...
CortexA9: GEL Output: DLL is ready
CortexA9: GEL Output: Configuring DDR IOs and Control Module registers...
CortexA9: GEL Output: Configuration of Control Module registers complete
CortexA9: GEL Output: Setting up DDR3 H/W leveling configuration...
CortexA9: GEL Output: Starting EMIF controller configuration...
CortexA9: GEL Output:

DDR3 Hardware leveling incomplete with errors !!!

CortexA9: GEL Output:

DDR3 CONFIGURATION FAILED!!! Could not read/write first DDR location.
CortexA9: GEL Output: Expected 0xA5A5A5A5, Read: 0x00000000

CortexA9: GEL Output: Turning on EDMA...
CortexA9: GEL Output: EDMA is turned on...
CortexA9: Output: **** AM437x IDK EVM Initialization is Done ******************

JTAG is XDS100v2, CCS version is 6.2.0.

Please give me any tips to solve the error. Thanks.

  • 0
    TI__Guru**** 168357 points
    Hi,

    The first error (151) indicates the XDS100v2 is unable to be acknowledged by CCS - typically because the board is powered off, there is an issue with the USB cable, etc. The xds100serial helps isolate the issue, which seems that you did successfully.

    The second set of errors starting with the message "CortexA9: Output" are originated from a different root cause. Looking at the sequence of events, this is heavily tied to the inability of the Hardware initialization scripts (GEL scripts) to properly initialize the DDR3 memory on the board.

    The root cause can be multiple:
    - The board has a hardware problem on the DDR memory ICs or the device itself. The easiest method to isolate this problem is by testing the same environment with another board. Apart from that, a very involving process of HW debugging will have to take place.
    - There is code running on the board that is preventing the script from properly configuring this interface. Make sure to remove any SD card or change the boot mode to prevent code from running at power up.
    - The GEL script configured in your target board is incompatible with the kit you are using. This may be caused by an invalid choice of board used when creating the Target Configuration File (choose the IDK_AM437X board) or perhaps the Revision of your board is too old and may be incompatible. Just for reference, my TMDSIDK437X board Rev 1.3A works well with this configuration.

    Hope this helps,
    Rafael