Part Number: TIDA-01513
Could you tell me why ISO_NEG goes high while only POS_SW is on-state with HV positive error test?
I referred to figure.22. I thought ISO_NEG would keep Vref because there is no current path via lower side resistors but it didn't. Could you show me the current path in that state and equation about ISO_NEG in this state?
Or did I misunderstand the switching state?
I think you are right. The ISO_NEG should be keep equal to VREF as there is no current flow at all.
I guess this might be caused by the supply isolation of 400V and 12V during the test.
How about testing it again by us?
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In reply to David Dong:
I would like to do that. But I could not test that board with high voltage, such 400V.
Is it OK to test with 12V and 40V, which imitate HV, with modified isolated resistor ladders and isolation leakage resistor?
In reply to Yoshiki Ochi:
I think 40V is enough for the test as the reference voltage is small as only 2.5V.
Do you have board in hand? If yes, it's quite quick to do so.
I'd like to see the result once you finished.
There is no latest board. I will order and test it.
I will let you know when test is finished.
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