CCS/TIDA-01604: main.cfg, parameters

Hi Jaeyup,

The AC current sense filter in the schematic applies Rfltr=33 Ohm, Cfltr = 0.047uF as shown below. It matches to what is configured in the Calculation sheet.

Then, should the value of Sense Filter in <Main.cfg> be changed as follows?
Rfltr(Ohm): 47 -> 33
Cfltr(uF): 0.047 -> 0.047
 
And for the remaining Current Sense and Voltage Sense, is it necessary to enter values as shown in the picture above?

Hi Jaeyup,

Yes, you can adjust all the values according to the TIDA-01604 schematic. For the voltage sense, the schematic is using 3 times of 316 kOhm (R602, R605 and R607), and the bottom resistance of 5.49k, this allows the internal ADC sense the max DC bus voltage of ~621V. The output of TIDA-01604 is 400V-600V adjustable.

Hi Xun,

I am curious about the switch direction of the TIDA-01604's control card. Looking at the datasheet, I am not good at English, so I don't understand it.
attach the photo. It is marked with a yellow box, but please check if the direction of the switch is correct according to the red arrow.

The control card settings look ok to me.

Look at the waveform picture above.
The peak value of the output ripple voltage is different, how can this be solved?

Not sure, we did not observe this type of ripple on the design on our end.

http://www.ti.com/lit/ug/tidue54b/tidue54b.pdf?ts=1591728626772&ref_url=http://www.ti.com/tool/TIDA-01604

do you see something on the input current as well?  

what version of the SDK are you using and at what power level are you running the system at. 

-Manish

There was no singularity in the input current.
CCS9.1.0
C2000Ware_DigitalPower_SDK_2_00_01_00
Input voltage 220VAC
Output voltage 400V
The load at that waveform is 1A.

We have not observed this issue on the voltage ripple being unbalanced, given that you do not have this show up on input current is rather suspicious. 

Are you testing with resistive load or with electronic load? 

Also does this issue happen in build level 2 as well? 

Noise is seen in the waveform of the input current (at no load)
When the load is applied, the shape of the input current sin wave is visible, but the noise is still visible.

If you proceed with build 2, the output voltage does not end at 400V, but continues to rise and the board becomes defective.
So I am skipping Build 2 and proceeding to Build 3 only.

Given this is a HW you build, i will be supicious of build issues. I think you need to focus on getting the system first fully tested under DC conditions as outlined in build 2 DC level and check you are able to match the results. 

Also from your reply it is not clear to me which issues are we talking about, 

You had posted an issue with asymmetry/distortion in the voltage ripple is that what you are referring to as noise now, you never mentioned about the input current noise before, in fact you had mentioned

"There was no singularity in the input current." in one of your older posts.