We're in the process of updating the kernel for one of our boards (an AM335X-based system, architecturally very similar to the AM335X EVM), and have run into some problems with the WiLink8. After updating the kernel from 3.14 to 4.9 (with matching updates to userspace and the .dts file for our board, not in the mainline kernel), on some individual boards, the WiLink8 always works, and on some other individual boards, it never shows up (no wlan0/wlp* in the output of "ip l", no "wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)" message in the kernel log, nothing). All individual boards behave identically (i.e. the WiLink8 works) with the old kernel/userspace, even after running the new kernel/userspace. Obviously from 3.14 to 4.9 is quite the jump, and our first thought was that we must have got something wrong when we updated our .dts file. We did find a couple of problems, but now we're left with no obvious significant differences between our .dts file and the mainline kernel's am335x-evm.dts file that we can't justify, and the problem continues exactly has it has been. I've read back through the WL18XX platform integration guide [0]. Apart from the age of the document, and the specific pins being used, everything looks right. All the right kernel modules are loaded (same on working/non-working systems). [0] http://processors.wiki.ti.com/index.php/WL18xx_Platform_Integration_Guide Any idea what might be wrong, or what we might need to check next? The attached kern.log files were generated on a working system and a non-working system, both running the same kernel, with CONFIG_MMC_DEBUG enabled (which isn't helping much). They aren't actually attached since there is a file size
limit. Please see logs here:
drive.google.com/.../1nsuCnwZpBQCNqsUziWeQbGLFG1bfF4sF
1018.am335x-icg.dts.txt
/*
* Copyright (C) 2014 Intwine Connect - http://www.intwineconnect.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM335x ICG P3";
compatible = "ti,am33xx", "ti,omap3";
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
chosen {
stdout-path = &uart0;
};
vbat: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
wlan_en_reg: fixedregulator2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
/* WLAN_EN GPIO for this board - Bank3, pin3 */
gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
/* WLAN card specific delay */
startup-delay-us = <70000>;
enable-active-high;
};
vtt_fixed: fixedregulator3 {
compatible = "regulator-fixed";
regulator-name = "vtt";
regulator-min-voltage = <1500000>;
regulator-max-voltage = <1500000>;
gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
regulator-always-on;
regulator-boot-on;
enable-active-high;
};
kim {
compatible = "kim";
nshutdown_gpio = <117>; /* Bank3, pin21 */
dev_name = "/dev/ttyO1";
flow_cntrl = <1>;
baud_rate = <3000000>;
};
btwilink {
compatible = "btwilink";
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = < &ddr3_vtt_toggle
&rgmii2_pins
&gpio_pins
&gpio_led_pins
&emmc_wp_only_pins
&clkout2_pin
>;
ddr3_vtt_toggle: ddr3_vtt_toggle {
pinctrl-single,pins = <
AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_sclk.i2c2_sda */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.itc2_scl */
>;
};
rgmii2_pins: pinmux_rgmii2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | MUX_MODE0 | SLEWCTRL_FAST) /* mdio_data.mdio_data, AM335X_RGMII1)MDIO_DATA */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk, AM335X_RGMII1)MDIO_CLK */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mdio_data.mdio_data, AM335X_RGMII1)MDIO_DATA */
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mdio_clk.mdio_clk, AM335X_RGMII1)MDIO_CLK */
>;
};
gpio_pins: pinmux_gpio_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x898, PIN_INPUT | MUX_MODE7) /* gpmc_wen.gpio2_4, GPIO_KEY1 */
AM33XX_IOPAD(0x894, PIN_INPUT | MUX_MODE7) /* gpmc_oen_ren.gpio2_3, GPIO_KEY2 */
AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7) /* gpmc_advn_ale.gpio2_2, GPIO_KEY3 */
AM33XX_IOPAD(0x89c, PIN_INPUT | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5, GPIO_KEY4 */
AM33XX_IOPAD(0x820, PIN_INPUT | MUX_MODE7) /* gpmc_ad8.gpio0_22, AM335X_GPIO0_22 */
AM33XX_IOPAD(0x824, PIN_INPUT | MUX_MODE7) /* gpmc_ad9.gpio0_23, AM335X_GPIO0_23 */
AM33XX_IOPAD(0x8c8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data10.gpio2_16, WWAN_IN_WAKEn */
AM33XX_IOPAD(0x8cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data11.gpio2_17, WWAN_GPS_DISn */
AM33XX_IOPAD(0x8d0, PIN_INPUT | MUX_MODE7) /* lcd_data12.gpio0_8, WWAN_GPIO5 */
AM33XX_IOPAD(0x8d4, PIN_INPUT | MUX_MODE7) /* lcd_data13.gpio0_9, WWAN_OUT_WAKEn */
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsr.gpio3_19, WWAN_DISn */
AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_rxd0.gpio2_21, WWAN_RSTn */
AM33XX_IOPAD(0x8e8, PIN_INPUT | MUX_MODE7) /* lcd_pclk.gpio2_24, USNAP_MDET */
AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.gpio0_26, UART2_RST */
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.gpio0_27, AM335X_LCD_DATA20 */
AM33XX_IOPAD(0x8a0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data0.gpio2_6, AM335X_LCD_DATA0 */
AM33XX_IOPAD(0x8a4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data1.gpio2_7, AM335X_LCD_DATA1 */
AM33XX_IOPAD(0x8a8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data2.gpio2_8, AM335X_LCD_DATA2 */
AM33XX_IOPAD(0x8ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data3.gpio2_9, AM335X_LCD_DATA3 */
AM33XX_IOPAD(0x8bc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data7.gpio2_13, AM335X_LCD_DATA7 */
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_d1.gpio0_4, RTC_INT */
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.gpio0_5, AM335X_UART3_485CTL */
AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2_25, PMIC_INT1_GPIO */
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18, AM335X_USB1_OC */
>;
};
gpio_led_pins: pinmux_gpio_led_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x93c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_rxd1.gpio2_20, AM335X_GPIO_LED1 */
AM33XX_IOPAD(0x878, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be1n.gpio1_28, AM335X_GPIO_LED2 */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2_22, AM335X_GPIO_LED3 */
AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.gpio2_23, AM335X_GPIO_LED4 */
AM33XX_IOPAD(0x8b8, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data6.gpio2_12, AM335X_GPIO_LED5 */
AM33XX_IOPAD(0x8b0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data4.gpio2_10, LED_GP */
AM33XX_IOPAD(0x8b4, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data5.gpio2_11, LED_RP */
>;
};
mcasp1_pins: pinmux_mcasp1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mii1_txd0.mcasp1_axr2 */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_refclk.mcasp1_axr3 */
>;
};
mcasp1_sleep_pins: mcasp1_sleep_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_crs.mcasp1_aclkx */
AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_rxerr.mcasp1_fsx */
AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mii1_txd0.mcasp1_axr2 */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk.mcasp1_axr3 */
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
emmc_wp_only_pins: pinmux_emmc_wp_only_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
>;
};
/* wl18xx card on mmc3 */
mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};
wlan_pins: pinmux_wlan_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txen.gpio3_3, COMWL_RST */
AM33XX_IOPAD(0x924, PIN_INPUT | MUX_MODE7) /* mii1_txd1.gpio0_21, AM335X_COM_WL_IRQ */
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkx.gpio3_21, COM_BT_RST */
>;
};
/* SD Card card on mmc1 */
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_INPUT | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8c0, PIN_INPUT | MUX_MODE6) /* lcd_data8.uart2_ctsn, UART2_CTS */
AM33XX_IOPAD(0x8c4, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data9.uart2_rtsn, UART2_RTS */
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_txclk.uart2_rxd, UART2_RXD */
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxclk.uart2_txd, UART2_TXD */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd, AM335X_UART3_RX */
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd, AM335X_UART3_TX */
>;
};
uart4_pins: pinmux_uart4_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0xf0, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd, AM335X_UART4_RXD */
AM33XX_IOPAD(0xf4, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd, AM335X_UART4_TXD */
>;
};
uart5_pins: pinmux_uart5_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE6) /* lcd_data14.uart5_ctsn, UART5_CTS */
AM33XX_IOPAD(0x8dc, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data15.uart5_rtsn, UART5_RTS */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE3) /* mii1_col.uart5_rxd, UART5_RX */
AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mii1_rxdv.uart5_txd, UART5_TX */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
AM33XX_IOPAD(0x998, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
>;
};
dcan0_pins: pinmux_dcan0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd3.dcan0_tx, AM335X_DCAN0_TX */
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_txd2.dcan0_rx, AM335X_DCAN0_RX */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&uart5_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
/* Set OPP50 (0.95V) for VDD core */
sleep-sequence = /bits/ 8 <
0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
>;
/* Set OPP100 (1.10V) for VDD core */
wake-sequence = /bits/ 8 <
0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
>;
tps: tps@2d {
reg = <0x2d>;
};
rtc_bq32k@68 {
compatible = "bq32000";
reg = <0x68>;
};
eeprom_24c256@50 {
compatible = "at24,24c256";
reg = <0x50>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
clock-frequency = <1000000>;
status = "okay";
};
&dcan0 {
pinctrl-names = "default";
pinctrl-0 = <&dcan0_pins>;
status = "okay";
};
&rtc {
clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
clock-names = "ext-clk", "int-clk";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "peripheral";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
&elm {
status = "okay";
};
#include "tps65910.dtsi"
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mcasp1_pins>;
pinctrl-1 = <&mcasp1_sleep_pins>;
status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */
tdm-slots = <2>;
/* 4 serializers */
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
0 0 1 2
>;
tx-num-evt = <32>;
rx-num-evt = <32>;
};
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1378000>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&gpio0 {
ti,no-reset-on-init;
};
&mac {
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rgmii-txid";
dual_emac_res_vlan = <2>;
};
/* SD card */
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
/* Onboard MMC */
&mmc2 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
ti,non-removable;
};
/* Jorgin WG7831-B0 (wl18xx) (SDIO interface) */
&mmc3 {
/* these are on the crossbar and are outlined in the
xbar-event-map element */
dmas = <&edma_xbar 12 0 1
&edma_xbar 13 0 2>;
dma-names = "tx", "rx";
status = "okay";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc3_pins &wlan_pins>;
ti,non-removable;
ti,needs-special-hs-handling;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
ref-clock-frequency = <38400000>;
};
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&wkup_m3 {
ti,needs-vtt-toggle;
ti,vtt-gpio-pin = <7>;
};
&sys_clkin_ck {
clocks = <&virt_24000000_ck>
, <&virt_24000000_ck>
, <&virt_24000000_ck>
, <&virt_24000000_ck>
;
};
