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CC1310: CC1310 WMBUS 434 MHz

Part Number: CC1310
Other Parts Discussed in Thread: WMBUS, , CC1101, CC1350

Hello,

I need to test the CC1310 RX perfomance in my wmbus application. My goal is to be able to read the packets coming from my endpoints with the CC1310. Due to regulation, the wmbus in my country operates in 434.475 MHz.

The main problem is that the  wmbus stack for the CC1310 doesnt have any kind of example for this particular frequency, only for 868 MHz. I didnt find any kind of documentation of how to change this.

I really dont want to port all the endpoint wmbus code that  I made for another transceiver  to CC1310 just to measure its performance....

Is there any simple RX wmbus T1/T2 example for CC1310 without using this stack from stackforce ?

Thanks !!

  • Hi Eduardo,

    We unfortunately do not have any such examples and you would need to use the StackForce stack. Is it RSSI you are after or anything more specific?
  • I tried to follow the steps described in application report: SWRA522E

    1- Then I downloaded the recommended settings for the cc1310: SWRA522

    2 - Uploaded it to smartRF Studio

    3 -  Changed the frequency from 868 MHz to 434.475, updated the settings accordingly.

    4 - Loaded the example rfPacketRx from the CC1310 SDK, but using the settings of step 3. The only parameters that smartrf changed was:

        .centerFreq = 0x01B2,
        .intFreq = 0x8000,
        .loDivider = 0x0A,
    
        .txPower = 0x913F,
        .frequency = 0x01B2,
        .fractFreq = 0x799A,

    5 - Tested on my board (for 434 MHz) and in the launchpad (868 MHz), didnt work (was unable to read wmbus packets from several wmbus devices).

  • I can also read some data, that are probably the wmbus packets, in the smartrf studio, but not in the rfPacketRx Firmware example.
  • Hi Eduardo,

    If all you want to do is to test the PHY, then you should be OK doing this, it should work for 434 MHz as well. When testing this out in the rfPacketRx project, did you make sure that you are using the wmbus patches? If you look at the patch struct at the top of the smartrf_settings.c file, what is filled in here?
  • Yes, i was using the wmbus patch in the smartf_settings.c file, that was the problem haha. This really doesnt work at all. I deleted this file and made a new one from scratch in smartf studio and then the cc1310 started to receive the packets. Now I have to do the 3 out of 6 decoding in software and i think i should be fine.

    I believe those wmbus patches only works in 868 MHz, which doesnt make any sense.

  • The minimum rssi that i was able to read was -80 dBm. The effective range was worse than cc1101 which has lower sensitivity. Something is wrong with the smartrf_settings generated by the smartRF studio. I cant use the wmbus patch or the wmbus smartf_settings.c because it will only work in 868 MHz i believe....
  • Hi Eduardo,

    The patch should work at 434 MHz as well. Could you share just how you are generating the settings you try to use?
  • Here is the settings:

    //*********************************************************************************
    // Generated by SmartRF Studio version 2.5.0 (build #27)
    // Tested for SimpleLink SDK version: CC13x0 SDK 1.0.xx
    // Device: CC1310 Rev. 2.1
    // 
    //*********************************************************************************
    
    
    //*********************************************************************************
    // Parameter summary
    // Address: aa-bb 
    // Frequency: 868.95000 MHz
    // Data Format: Serial mode disable 
    // Deviation: 50.000 kHz
    // Packet Length Config: Variable 
    // Max Packet Length: 128 
    // Packet Length: 30 
    // RX Filter BW: 196 kHz
    // Symbol Rate: 100.00038 kBaud
    // Sync Word Length: 16 Bits 
    // TX Power: 14 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
    // Whitening: No whitening 
    
    
    #ifdef DEVICE_FAMILY 
        #undef DEVICE_FAMILY_PATH 
        #define DEVICE_FAMILY_PATH(x) <ti/devices/DEVICE_FAMILY/x> 
    #else 
        #error "You must define DEVICE_FAMILY at the project level as one of cc26x0, cc26x0r2, cc13x0, etc." 
    #endif 
        
    
    #include DEVICE_FAMILY_PATH(driverlib/rf_mailbox.h)
    #include DEVICE_FAMILY_PATH(driverlib/rf_common_cmd.h)
    #include DEVICE_FAMILY_PATH(driverlib/rf_prop_cmd.h)
    #include <ti/drivers/rf/RF.h>
    #include DEVICE_FAMILY_PATH(rf_patches/rf_patch_cpe_wmbus_ctmode.h)
    #include DEVICE_FAMILY_PATH(rf_patches/rf_patch_mce_wmbus_ctmode.h)
    #include DEVICE_FAMILY_PATH(rf_patches/rf_patch_rfe_wmbus_ctmode.h)
    #include "smartrf_settings.h"
    
    uint32_t txShapeTMode[] = {0x00000000, 0x00000000, 0x00000000, 0x4B110200, 0xF2F0E1A6, 0xF2F2F2F2};   
    uint32_t txShapeCMode[] = {0x00000000, 0x00000000, 0x00000000, 0x440F0200, 0xD9D8CA96, 0xD9D9D9D9};
    
    // TI-RTOS RF Mode Object
    RF_Mode RF_prop =
    {
        .rfMode = RF_MODE_PROPRIETARY_SUB_1,
        .cpePatchFxn = &rf_patch_cpe_wmbus_ctmode,
        .mcePatchFxn = &rf_patch_mce_wmbus_ctmode,
        .rfePatchFxn = &rf_patch_rfe_wmbus_ctmode,
    };
    
    // Overrides for CMD_PROP_RADIO_DIV_SETUP
    static uint32_t pOverrides[] =
    {
    	//Run the MCE and RFE patches
        MCE_RFE_OVERRIDE(1,0,0,1,0,0),
        // override_synth_prop_863_930_div5.xml
        // Synth: Set recommended RTRIM to 7
        HW_REG_OVERRIDE(0x4038,0x0037),
        // Synth: Set Fref to 4 MHz
        (uint32_t)0x000684A3,
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4020,0x7F00),
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4064,0x0040),
        // Synth: Configure fine calibration setting
        (uint32_t)0xB1070503,
        // Synth: Configure fine calibration setting
        (uint32_t)0x05330523,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x0A480583,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x7AB80603,
        // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
        ADI_REG_OVERRIDE(1,4,0x9F),
        // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
        ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
        // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
        (uint32_t)0x02010403,
        // Synth: Configure extra PLL filtering
        (uint32_t)0x00108463,
        // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
        (uint32_t)0x04B00243,
        // override_phy_rx_aaf_bw_0xd.xml
        // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
        ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
        // override_phy_gfsk_rx.xml
        // Rx: Set LNA bias current trim offset to 3
        (uint32_t)0x00038883,
        // Rx: Freeze RSSI on sync found event
        HW_REG_OVERRIDE(0x6084,0x35F1),
        // override_phy_gfsk_pa_ramp_agc_reflevel_0x2e.xml
        // Tx: Configure PA ramping setting and set AGC reference level to 0x2E
        HW_REG_OVERRIDE(0x6088,0x082E),
        // Tx: Configure PA ramping setting and set AGC settle wait = (0x7+1)*2 = 16 samples
        HW_REG_OVERRIDE(0x608C,0x0407),
        // override_phy_rx_rssi_offset_5db.xml
        // Rx: Set RSSI offset to adjust reported RSSI by +5 dB
        (uint32_t)0x00FB88A3,
        // TX power override
        // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
        ADI_REG_OVERRIDE(0,12,0xF8),
    	// AGC winsize 2 samples
        HW_REG_OVERRIDE(0x6064,0x1101),
        // CS threshold to –107 dBm
        HW_REG_OVERRIDE(0x6090,0xA095),
        // Let the patch control the correlator setting
        (uint32_t)0x00048103,
        // Clear state in internal radio register due to frequency change
        HW_REG_OVERRIDE(0x51F8,0x0000),
        // Set divider bias to disabled
        HW32_ARRAY_OVERRIDE(0x405C,1),
        (uint32_t)0x18000200,
        // TX shape in T-mode
        0xC0040031,
        (uint32_t)&txShapeTMode[0],
        // TX shape in C-mode
        //0xC0040031,
        //(uint32_t)&txShapeCMode[0],
        (uint32_t)0xFFFFFFFF,
    };
    
    
    // CMD_PROP_RADIO_DIV_SETUP
    rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup =
    {
        .commandNo = 0x3807,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .modulation.modType = 0x0,
        .modulation.deviation = 0xC8, // T-Mode: 0xC8, C-Mode: 0xB4
        .symbolRate.preScale = 0xC,
        .symbolRate.rateWord = 0xCCCD,
        .rxBw = 0x27,
        .preamConf.nPreamBytes = 0x4,
        .preamConf.preamMode = 0x0,
        .formatConf.nSwBits = 0x10,
        .formatConf.bBitReversal = 0x0,
        .formatConf.bMsbFirst = 0x1,
        .formatConf.fecMode = 0x0,
        .formatConf.whitenMode = 0x0,
        .config.frontEndMode = 0x0,
        .config.biasMode = 0x1,
        .config.analogCfgMode = 0x0,
        .config.bNoFsPowerUp = 0x0,
        .txPower = 0xA73F,
        .pRegOverride = pOverrides,
        .centerFreq = 0x01B2,
        .intFreq = 0x8000,
        .loDivider = 0x0A,
    };
    
    // CMD_FS
    rfc_CMD_FS_t RF_cmdFs =
    {
        .commandNo = 0x0803,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .frequency = 0x01B2,
        .fractFreq = 0x799A,
        .synthConf.bTxMode = 0x0,
        .synthConf.refFreq = 0x0,
        .__dummy0 = 0x00,
        .__dummy1 = 0x00,
        .__dummy2 = 0x00,
        .__dummy3 = 0x0000,
    };
    
    // CMD_PROP_TX
    rfc_CMD_PROP_TX_t RF_cmdPropTx =
    {
        .commandNo = 0x3801,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bUseCrc = 0x1,
        .pktConf.bVarLen = 0x1,
        .pktLen = 0x1E, // SET APPLICATION PAYLOAD LENGTH
        .syncWord = 0x0000543D,
        .pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    
    // CMD_PROP_RX
    rfc_CMD_PROP_RX_t RF_cmdPropRx =
    {
        .commandNo = 0x3802,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bRepeatOk = 0x0,
        .pktConf.bRepeatNok = 0x0,
        .pktConf.bUseCrc = 0x1,
        .pktConf.bVarLen = 0x1,
        .pktConf.bChkAddress = 0x0,
        .pktConf.endType = 0x0,
        .pktConf.filterOp = 0x0,
        .rxConf.bAutoFlushIgnored = 0x0,
        .rxConf.bAutoFlushCrcErr = 0x0,
        .rxConf.bIncludeHdr = 0x1,
        .rxConf.bIncludeCrc = 0x0,
        .rxConf.bAppendRssi = 0x0,
        .rxConf.bAppendTimestamp = 0x0,
        .rxConf.bAppendStatus = 0x1,
        .syncWord = 0x0000543D,
        .maxPktLen = 0x80, // MAKE SURE DATA ENTRY IS LARGE ENOUGH
        .address0 = 0xAA,
        .address1 = 0xBB,
        .endTrigger.triggerType = 0x1,
        .endTrigger.bEnaCmd = 0x0,
        .endTrigger.triggerNo = 0x0,
        .endTrigger.pastTrig = 0x0,
        .endTime = 0x00000000,
        .pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx
        .pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    
    
    

    It works only if I comment out this line below, but it can receive only packets with 30 bytes or less. The wmbus packets that i need to receive have 34 bytes :

    // Set divider bias to disabled
         //HW32_ARRAY_OVERRIDE(0x405C,1),

    If i disable the wmbus patches doing this:

    MCE_RFE_OVERRIDE(0,4,0,1,0,0),

    It will work but i will have to make the 3 out of 6 decoding in software and i am still getting some troubles regarding crc checking.

    In both cases, the perfomance is very bad, worse than CC1101....

    I am using RFPacketRx example (with rtos) to read the data.

  • Hi E,

    What revision of CC1310 do you have? The WMBUS patch settings only work for CC1310 Rev B and would not work at all for Rev A. The fact that you need to remove overrides makes me wonder if you might be sitting on a Rev A device?

    When testing to receiving packets in the way you do, you should also disable:

    .pktConf.bUseCrc = 0x1,
    .pktConf.bVarLen = 0x1,

    This means you need to use fixed packet length for the packet you expect to receive.
  • CC1310 revision B.

    The only way i could read the wireless mbus packets using the patch was doing this modifications:

    HW32_ARRAY_OVERRIDE(0x405C,1), -----> //HW32_ARRAY_OVERRIDE(0x405C,1),

    .pktConf.bUseCrc = 0x1, -----> .pktConf.bUseCrc = 0,
    .pktConf.bVarLen = 0x1, -----> .pktConf.bVarLen = 0,
    .maxPktLen = 0x80, -----> .maxPktLen = 37,

    But without crc checking, i don't know if the receive packet is valid or not, but working with the "raw"packet, it is possible to check crc in the 3 out 6 decoding procedure, so i still cant use the patch.

    The perfomance with the patch is still bad, almost the same of not using the patch.
  • Hi Eduardo,

    So looking closer at the settings provided in the application note, you need to do the following changes to run at 433 MHz using the patches when using a Revision B device :

    (uint32_t)0x18000280, -> (uint32_t)0x18000200,
    (uint32_t)0x000288A3, -> (uint32_t)0x00FB88A3,
    .txPower = 0xA73F, -> .txPower = 0x913F,
    .centerFreq = 0x0364, -> .centerFreq = 0x01B1,
    .loDivider = 0x05, -> .loDivider = 0x0A
    .frequency = 0x0364, -> .frequency = 0x01B1,

    Also, as long as you are not using the stack but rfPacketRx to receive the packets, you would need to use fixed length packets and do the CRC check, length filtering etc. yourself in the application (as the stack typically takes care of this for you).
  • This changes worked with and without the wmbus patches:

    (uint32_t)0x18000280,(no change)

    (uint32_t)0x000288A3, -> (uint32_t)0x00FB88A3,

    .txPower = 0xA73F, -> .txPower = 0x913F,

    .centerFreq = 0x0364, -> .centerFreq = 0x01B2,

    .loDivider = 0x05, -> .loDivider = 0x0A

    .frequency = 0x0364, -> .frequency = 0x01B2,

    I am using the rfPacketRX and currently not using the wmbus patch, because i am doing the 3out6 decoding in software. Didnt notice any difference in perfomance when using the patch or am i wrong?

    I am assuming that the poor perfomance is not related with this settings, could you confirm this?

    Thanks

  • Hi Eduardo,

    The performance with patch and settings should not be poor. When you are testing this out, what hardware are you using? If you are running on a LaunchPad, do you have the 433 MHz varion of the CC1310 LaunchPad?

  • I am using my own hardware. Designed following the design reference for 434 MHz for the CC1310. There is only a launchpad for the CC1350 in 434 MHz.

  • Hi Eduardo,

    I see. I had a college do some tests using the patch and 434 MHz settings on the desk and we did not see the poor performance you suggest to be seeing. Due to holidays, I can not get back with more information on this until early next week, in the time being, could you verify the markings on the CC1310 IC you have mounted for me?
  • Hello M-W,

    CC1310F128 79j PJ09 G4. The revision is B (checked on smartrf studio)

    I followed this design reference for my board: swrc330 (CC13xxEM-7XD-4251).

     

     

  • Tried everything i could think of, but the receiver with cc1310 keeps performing worse than cc1101 in the wmbus link. Cant almost get no valid packets below -80 dBm.

    The transmitters are also cc1101 based, i dont know if this should make difference.
  • Do you have two CC1310 boards (your own) that you can test with 433 MHz settings from SmartRF Studio? You can use the rfPacketRX and rfPacket TX example and use settings exported from Studio. By doing this you can test known good settings on you HW to see that the HW is OK.

    BR
    Siri
  • I believe i can do this kind of test directly in SmartRF Studio if i set one board as RX and another for TX. Am i right? I will do this and try to see if the same problems happens in SmartRF Studio so i can exclude any hardware issues.

  • Hi Eduardo,

    Did you have time to perform the tests?
  • Hi,

    It was a little better, but in my application the transmitters are always cc1101 based, so i dont know what to do. I will make another board and maybe test it with the cc1350 434 MHz launchpad.

  • Hi Eduardo,

    So testing it in Smart RF Studio still showed issues in terms of performance is that correct?
  • I almost have the same problem and after few day, i get the same issue as above, i check the whole forum , seem there ;s still no solution for that ~ btw beside you do the 3 out of 6 coding , no other solution?
  • Yes, when receiving the wmbus data from the cc1101 end devices , the maximum rssi that i received in both rf studio and in normal operation was -80 dBm. Until now i couldnt find any solution for this. I will try another board design to see if it helps, but i still think there is something wrong in firmware level.

  • I could read wmbus data using the cc1310 wmbus patch without the 3 out of 6 encoding by software, but i couldnt make the crc checking with this approach, so i decided to do the 3 out of 6 coding and then i could check the crc and discard the invalid packets. I can help you with this if you need. Are you dealing with perfomance issues too ?
  • HI Eduardo Bernardi,

    i am still working on the patch,

    i got the same problem with you ,

    that """

    It works only if I comment out this line below, but it can receive only packets with 30 bytes or less. The wmbus packets that i need to receive have 34 bytes :

    // Set divider bias to disabled
         //HW32_ARRAY_OVERRIDE(0x405C,1),

    If i disable the wmbus patches doing this:

    MCE_RFE_OVERRIDE(0,4,0,1,0,0),

    How do you solve this ?

    thanks

    Jeff

  • I will attach my smartrf_settings. It works perfectly for receiving wmbus packets in 434.475 MHz, but you must write the 3 out 6 decoding !

    1016.smartrf_settings.c
    //*********************************************************************************
    // Generated by SmartRF Studio version 2.9.0 (build#85)
    // Compatible with SimpleLink SDK version: CC13x0 SDK 2.10.xx.xx
    // Device: CC1310 Rev. 2.1 (Rev. B)
    // 
    //*********************************************************************************
    
    
    //*********************************************************************************
    // Parameter summary
    // Address: 0
    // Address0: 0xAA
    // Address1: 0xBB
    // Frequency: 434.47501 MHz
    // Data Format: Serial mode disable 
    // Deviation: 50.000 kHz
    // pktLen: 30
    // 802.15.4g Mode: 0
    // Select bit order to transmit PSDU octets:: 1
    // Packet Length Config: Variable 
    // Max Packet Length: 128 
    // Packet Length: 20
    // Packet Data: 255
    // RX Filter BW: 311 kHz
    // Symbol Rate: 100.00000 kBaud
    // Sync Word Length: 16 Bits 
    // TX Power: 15 dBm (requires define CCFG_FORCE_VDDR_HH = 1 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual)
    // Whitening: No whitening 
    
    #include <ti/devices/DeviceFamily.h>
    #include DeviceFamily_constructPath(driverlib/rf_mailbox.h)
    #include DeviceFamily_constructPath(driverlib/rf_common_cmd.h)
    #include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h)
    #include <ti/drivers/rf/RF.h>
    #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_genfsk.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genfsk.h)
    
    #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_wmbus_ctmode.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_wmbus_ctmode.h)
    #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_wmbus_ctmode.h)
    
    #include "smartrf_settings.h"
    
    uint32_t txShapeTMode[] = {0x00000000, 0x00000000, 0x00000000, 0x4B110200, 0xF2F0E1A6, 0xF2F2F2F2};
    uint32_t txShapeCMode[] = {0x00000000, 0x00000000, 0x00000000, 0x440F0200, 0xD9D8CA96, 0xD9D9D9D9};
    
    #if(0)
    // TI-RTOS RF Mode Object
    RF_Mode RF_prop =
    {
        .rfMode = RF_MODE_PROPRIETARY_SUB_1,
        .cpePatchFxn = &rf_patch_cpe_genfsk,
        .mcePatchFxn = 0,
        .rfePatchFxn = &rf_patch_rfe_genfsk,
    };
    #else
    RF_Mode RF_prop =
    {
        .rfMode = RF_MODE_PROPRIETARY_SUB_1,
        .cpePatchFxn = &rf_patch_cpe_wmbus_ctmode,
        .mcePatchFxn = &rf_patch_mce_wmbus_ctmode,
        .rfePatchFxn = &rf_patch_rfe_wmbus_ctmode,
    };
    #endif
    
    // TX Power table
    // The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments:
    // RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient)
    // See the Technical Reference Manual for further details about the "txPower" Command field.
    // The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise.
    RF_TxPowerTable_Entry txPowerTable[] =
    {
        {-10, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 2) },
        {0, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 7) },
        {2, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 9) },
        {3, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 11) },
        {4, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 12) },
        {5, RF_TxPowerTable_DEFAULT_PA_ENTRY(3, 3, 0, 16) },
        {6, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 18) },
        {7, RF_TxPowerTable_DEFAULT_PA_ENTRY(5, 3, 0, 21) },
        {8, RF_TxPowerTable_DEFAULT_PA_ENTRY(6, 3, 0, 23) },
        {9, RF_TxPowerTable_DEFAULT_PA_ENTRY(8, 3, 0, 28) },
        {10, RF_TxPowerTable_DEFAULT_PA_ENTRY(11, 3, 0, 35) },
        {11, RF_TxPowerTable_DEFAULT_PA_ENTRY(8, 1, 0, 39) },
        {12, RF_TxPowerTable_DEFAULT_PA_ENTRY(14, 1, 0, 60) },
        {13, RF_TxPowerTable_DEFAULT_PA_ENTRY(15, 0, 0, 108) },
        {14, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 0, 92) }, // The original PA value (13.7 dBm) have been rounded to an integer value.
        {15, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 1, 72) }, // This setting requires CCFG_FORCE_VDDR_HH = 1.
        RF_TxPowerTable_TERMINATION_ENTRY
    };
    
    
    #if(0)
    // Overrides for CMD_PROP_RADIO_DIV_SETUP
    uint32_t pOverrides[] =
    {
        // override_use_patch_prop_genfsk.xml
        // PHY: Use MCE ROM bank 4, RFE RAM patch
        MCE_RFE_OVERRIDE(0,4,0,1,0,0),
        // override_synth_prop_863_930_div5.xml
        // Synth: Set recommended RTRIM to 7
        HW_REG_OVERRIDE(0x4038,0x0037),
        // Synth: Set Fref to 4 MHz
        (uint32_t)0x000684A3,
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4020,0x7F00),
        // Synth: Configure fine calibration setting
        HW_REG_OVERRIDE(0x4064,0x0040),
        // Synth: Configure fine calibration setting
        (uint32_t)0xB1070503,
        // Synth: Configure fine calibration setting
        (uint32_t)0x05330523,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x0A480583,
        // Synth: Set loop bandwidth after lock to 20 kHz
        (uint32_t)0x7AB80603,
        // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
        ADI_REG_OVERRIDE(1,4,0x9F),
        // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
        ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
        // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
        (uint32_t)0x02010403,
        // Synth: Configure extra PLL filtering
        (uint32_t)0x00108463,
        // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
        (uint32_t)0x04B00243,
        // override_phy_rx_aaf_bw_0xd.xml
        // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
        ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
        // override_phy_gfsk_rx.xml
        // Rx: Set LNA bias current trim offset to 3
        (uint32_t)0x00038883,
        // Rx: Freeze RSSI on sync found event
        HW_REG_OVERRIDE(0x6084,0x35F1),
        // override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml
        // Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x1A.
        HW_REG_OVERRIDE(0x6088,0x411A),
        // Tx: Configure PA ramping setting
        HW_REG_OVERRIDE(0x608C,0x8213),
        // override_phy_rx_rssi_offset_5db.xml
        // Rx: Set RSSI offset to adjust reported RSSI by +5 dB
        (uint32_t)0x00FB88A3,
        // TX power override
        // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
        ADI_REG_OVERRIDE(0,12,0xF8),
    
        // AGC winsize 2 samples
         //   HW_REG_OVERRIDE(0x6064,0x1101),
            // CS threshold to �107 dBm
           // HW_REG_OVERRIDE(0x6090,0xA095),
    
        (uint32_t)0xFFFFFFFF,
    };
    #else
    static uint32_t pOverrides[] =
    {
     //Run the MCE and RFE patches
         MCE_RFE_OVERRIDE(0,4,0,1,0,0), //(1,0,0,1,0,0) (patched), (0,4,0,1,0,0) (otherwise)
         // override_synth_prop_863_930_div5.xml
         // Synth: Set recommended RTRIM to 7
         HW_REG_OVERRIDE(0x4038,0x0037),
         // Synth: Set Fref to 4 MHz
         (uint32_t)0x000684A3,
         // Synth: Configure fine calibration setting
         HW_REG_OVERRIDE(0x4020,0x7F00),
         // Synth: Configure fine calibration setting
         HW_REG_OVERRIDE(0x4064,0x0040),
         // Synth: Configure fine calibration setting
         (uint32_t)0xB1070503,
         // Synth: Configure fine calibration setting
         (uint32_t)0x05330523,
         // Synth: Set loop bandwidth after lock to 20 kHz
         (uint32_t)0x0A480583,
         // Synth: Set loop bandwidth after lock to 20 kHz
         (uint32_t)0x7AB80603,
         // Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)
         ADI_REG_OVERRIDE(1,4,0x9F),
         // Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)
         ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),
         // Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering
         (uint32_t)0x02010403,
         // Synth: Configure extra PLL filtering
         (uint32_t)0x00108463,
         // Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)
         (uint32_t)0x04B00243,
         // override_phy_rx_aaf_bw_0xd.xml
         // Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)
         ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),
         // override_phy_gfsk_rx.xml
         // Rx: Set LNA bias current trim offset to 3
         (uint32_t)0x00038883,
         // Rx: Freeze RSSI on sync found event
         HW_REG_OVERRIDE(0x6084,0x35F1),
         // override_phy_gfsk_pa_ramp_agc_reflevel_0x2e.xml
         // Tx: Configure PA ramping setting and set AGC reference level to 0x2E
         HW_REG_OVERRIDE(0x6088,0x082E),
         // Tx: Configure PA ramping setting and set AGC settle wait = (0x7+1)*2 = 16 samples
         HW_REG_OVERRIDE(0x608C,0x0407),
         // override_phy_rx_rssi_offset_5db.xml
         // Rx: Set RSSI offset to adjust reported RSSI by +5 dB
         (uint32_t)0x00FB88A3,
         // TX power override
         // Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)
         ADI_REG_OVERRIDE(0,12,0xF8),
    #if(1)
         // AGC winsize 2 samples
         HW_REG_OVERRIDE(0x6064,0x1101),
         // CS threshold to �107 dBm
         HW_REG_OVERRIDE(0x6090,0xA095),
         // Let the patch control the correlator setting
         (uint32_t)0x00048103,
         // Clear state in internal radio register due to frequency change
         HW_REG_OVERRIDE(0x51F8,0x0000),
         // Set divider bias to disabled
         HW32_ARRAY_OVERRIDE(0x405C,1),
         (uint32_t)0x18000280,
         // TX shape in T-mode
         0xC0040031,
         (uint32_t)&txShapeTMode[0],
         // TX shape in C-mode
         //0xC0040031,
         //(uint32_t)&txShapeCMode[0],
    #endif
         (uint32_t)0xFFFFFFFF,
    };
    #endif
    
    // CMD_PROP_RADIO_DIV_SETUP
    // Proprietary Mode Radio Setup Command for All Frequency Bands
    rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup =
    {
        .commandNo = 0x3807,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .modulation.modType = 0x0,
        .modulation.deviation = 0xC8,
        .symbolRate.preScale = 0xC,//0xF
        .symbolRate.rateWord = 0xCCCD, //0x10000
        .rxBw = 0x27, //0x29
        .preamConf.nPreamBytes = 0x4,//4
        .preamConf.preamMode = 0x0,
        .formatConf.nSwBits = 0x10,
        .formatConf.bBitReversal = 0x0,
        .formatConf.bMsbFirst = 0x1,
        .formatConf.fecMode = 0x0,
        .formatConf.whitenMode = 0x0,
        .config.frontEndMode = 0x0,
        .config.biasMode = 0x1,
        .config.analogCfgMode = 0x0,
        .config.bNoFsPowerUp = 0x0,
        .txPower = 0x913F,
        .pRegOverride = pOverrides,
        .centerFreq = 0x01B2,
        .intFreq = 0x8000,
        .loDivider = 0x0A,
    };
    
    // CMD_FS
    // Frequency Synthesizer Programming Command
    rfc_CMD_FS_t RF_cmdFs =
    {
        .commandNo = 0x0803,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .frequency = 0x01B2,
        .fractFreq = 0x799A,//0x799A,
        .synthConf.bTxMode = 0x0,
        .synthConf.refFreq = 0x0,
        .__dummy0 = 0x00,
        .__dummy1 = 0x00,
        .__dummy2 = 0x00,
        .__dummy3 = 0x0000,
    };
    
    // CMD_PROP_RX
    // Proprietary Mode Receive Command
    rfc_CMD_PROP_RX_t RF_cmdPropRx =
    {
        .commandNo = 0x3802,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bRepeatOk = 0x0,
        .pktConf.bRepeatNok = 0x0,
        .pktConf.bUseCrc = 0x0,
        .pktConf.bVarLen = 0x0, //1
        .pktConf.bChkAddress = 0x0,
        .pktConf.endType = 0x0,
        .pktConf.filterOp = 0x0,
        .rxConf.bAutoFlushIgnored = 0x0,
        .rxConf.bAutoFlushCrcErr = 0x0,
        .rxConf.bIncludeHdr = 0x1,//1
        .rxConf.bIncludeCrc = 0x0,//0
        .rxConf.bAppendRssi = 0x0,
        .rxConf.bAppendTimestamp = 0x0,
        .rxConf.bAppendStatus = 0x1,
        .syncWord = 0x0000543D,
        .maxPktLen = 56,// 37 (patched), 56 (otherwise)
        .address0 = 0xAA,
        .address1 = 0xBB,
        .endTrigger.triggerType = 0x1,
        .endTrigger.bEnaCmd = 0x0,
        .endTrigger.triggerNo = 0x0,
        .endTrigger.pastTrig = 0x0,
        .endTime = 0x00000000,
        .pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx
        .pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    
    // CMD_PROP_TX
    // Proprietary Mode Transmit Command
    rfc_CMD_PROP_TX_t RF_cmdPropTx =
    {
        .commandNo = 0x3801,
        .status = 0x0000,
        .pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
        .startTime = 0x00000000,
        .startTrigger.triggerType = 0x0,
        .startTrigger.bEnaCmd = 0x0,
        .startTrigger.triggerNo = 0x0,
        .startTrigger.pastTrig = 0x0,
        .condition.rule = 0x1,
        .condition.nSkip = 0x0,
        .pktConf.bFsOff = 0x0,
        .pktConf.bUseCrc = 0x1,
        .pktConf.bVarLen = 0x1,
        .pktLen = 56,//37 (patched), 56 (otherwise)
        .syncWord = 0x0000543D,
        .pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx
    };
    

  • I ported my firmware to the cc1350 and tested it in the 434 MHz launchpad. The perfomance was significantly better than my custom board with cc1310. Now i can read packets up to -95 dBm. The bitrate is 100 kbps when operating in wmbus t1 mode in my case. Is this the best perfomance that i can achieve with cc1310 or cc1350? Is there anything that i could improve in firmware level?
  • HI Eduardo Bernardi,

    I try to port the smartrfsetting into the RFRxpacket but it is no luck,

    can you have some idea of how i garb the data which i can saw in smartRFstudio, i know i need to work of CRC on that part.

    thanks

    Jeff

  • The CC1350 has a sensitivity of -110 dBm at 433 (50 kbps) so I will assume better than -95 on 100 kbps.

    Can you do testing with SmartRF Studio on the LP and not using your own code? You can use SmartRF Studio + CC1101 on the transmitter side also, and see what results you get when you have known firmware and settings generated from Studio.

    Siri
  • Hi Eduardo,

    Do you got any update based on Siri suggestions/requests?

  • Hi Eduardo,

    I will close this thread for now, fell free to add to this thread when you got more information. In the case that it is locked by the system, use the "Ask a related question" button to continue on the discussion.