Hi,
We are developing the host driver of CC3120, and the MCU communicates with the CC3120 through the SPI interface.
According to the data sheet, host should pull down the nHIB pin and then high to reset the CC3120. After receiving the IRQ from CC3120, host should send the 4-byte sync pattern and then read back the response. By tracing the source code in the SDK, host driver issues SPI read operation right after sending out the 4-byte sync pattern. Without any synchronization mechanism between host and CC3120, how could we make sure that CC3120's response is ready when host driver sends out the SPI read command?
By the way, the data sheet says that the maximum SPI clock for CC3120 is 20MHz. What is the minimum SPI clock that could make CC3120 work correctly?
Thanks.
Todd