Hi All,
I am attempting to RF link between a Stellaris launchpad (EK-LM4F120XL) and the new Tiva connected launchpad (EK-TM4C129XL) using a pair of CC110L AIR Boosterpacks. I went about writing my own libraries from scratch for the hell of it and it is nearly 100% working (working directly from the CC110L data sheet).
Both boards can read/write to the CC110L's config and status registers with no issue.
The issue is that I seem to get an incredible amount of junk in my receiver side RX FIFO. If this were purely random I would assume I had just gone wrong somewhere but I can see that the original packet transmitted is in the FIFO along with the junk.
The first packet sent by the transmitter is received perfectly but after that the RX FIFO seems to get flooded.
I keep reading that Smart RF should be used to get the ideal register settings for the CC110L. How does one go about this with the AIR Boosterpacks ? (if possible). I have opened Smart RF and selected the CC110L and used some of the default reg settings listed there but I must admit I went a bit cross-eyed when the data sheet started talking about the "RF" aspects (LNA currents etc.).
The Register settings I am using are as follows:
CC110L_IOCFG2, 0x29 // GDO2 output pin config.`CHIP_RDYn CC110L_IOCFG1, 0x2E // GDO1 output pin config.`HIGH IMP CC110L_IOCFG0, 0x06 // GDO0 output pin config.`sync high on rx and tx CC110L_FIFOTHR, 0x07 // THR.`32 bytes RX ; 33 bytes TX fifo CC110L_SYNC1, 0xD3 // Packet automation control.` CC110L_SYNC0, 0x91 // Packet automation control.` CC110L_PKTLEN, 0xFF // Packet length.` CC110L_PKTCTRL1, 0x0D // `flush when CRC not ok , Append Enabled .. Address Check Enabled CC110L_PKTCTRL0, 0x05 // `normal mode ,CRC enabled , variable packet length CC110L_ADDR, 0x33 // Device address.` 0x33 is arbitrary (TX side sends to this addr) CC110L_CHANNR, 0x80 // Channel number. CC110L_FSCTRL1, 0x0C // Freq synthesizer control.`..2 CC110L_FSCTRL0, 0x00 CC110L_FREQ2, 0x21 // Freq control word, high byte` CC110L_FREQ1, 0x62 // Freq control word, mid byte.` CC110L_FREQ0, 0x76 // Freq control word, low byte.` CC110L_MDMCFG4, 0xEA // Modem configuration.` => From Smart RF Default CC110L_MDMCFG3, 0x71 // Modem configuration.` CC110L_MDMCFG2, 0x13 // Modem configuration.` CC110L_MDMCFG1, 0x20 // Modem configuration.` CC110L_MDMCFG0, 0xF8 // Modem configuration.` CC110L_DEVIATN, 0x33 // Modem dev (when FSK mod en)`?? CC110L_MCSM2, 0x07 //MainRadio Cntrl State Machine` CC110L_MCSM1 , 0x3F //MainRadio Cntrl State Machine`stay in tx CC110L_MCSM0 , 0x18 //MainRadio Cntrl State Machine` CC110L_FOCCFG, 0x16 // Freq Offset Compens. Config`?? CC110L_BSCFG, 0x6C // Bit synchronization config.`?? CC110L_AGCCTRL2, 0x43 // AGC control.` CC110L_AGCCTRL1, 0x4F // AGC control.` CC110L_AGCCTRL0, 0x91 // AGC control.` CC110L_WOREVT1, 0x00 // WOR ?? CC110L_WOREVT0, 0x00 // WOR ?? CC110L_WORCTRL, 0xF8 // WOR ?? CC110L_FREND1, 0x56 // Front end RX configuration.` CC110L_FREND0, 0x10 // Front end RX configuration.` CC110L_FSCAL3, 0xE9 // Frequency synthesizer cal.` CC110L_FSCAL2, 0x2A // Frequency synthesizer cal.` CC110L_FSCAL1, 0x00 // Frequency synthesizer cal.` CC110L_FSCAL0, 0x1F // Frequency synthesizer cal.` CC110L_RCCTRL1, 0x00 // Packet automation control.` CC110L_RCCTRL0, 0x00 // Packet automation control.` CC110L_FSTEST, 0x59 // Frequency synthesizer cal. CC110L_PSTEST, 0x7F // Frequency synthesizer cal. CC110L_AGCTEST, 0x3F // Frequency synthesizer cal. CC110L_TEST2, 0x81 // Various test settings.` CC110L_TEST1, 0x35 // Various test settings.` CC110L_TEST0, 0x09 // Various test settings.`
The same settings are used on both ends (Rx and TX) with the exception of the device Address.
After messing around for roughtly 200 years I just decided to output the entire RX FIFO when GDO0 triggers an interrupt (Setting IOCFG0= 0x06 .. asserts when sync byte is seen).
The following is a typical output:
NOTE: Bytes being transmitted are "7 , 51 , 2 , 4 , 6 , 2 ,4 ,6 " periodically
Where '7' is the packet length field , and '51' is the address (0x33 above)
So we expect the Rx FIFO to contain 51 , 2 , 4 , 6 , 2 ,4 ,6
First Transmission:
ISR TRIGGERED
,Rx Fifo : 51 2 4 6 2 4 8
Leaving ISR
// ALL FINE WITH THIS ONE !
Second Transmission:
ISR TRIGGERED 1
,Rx Fifo : 171 7 51 2 4 6 2 4 8 85 167 167 95 162 58 192 6 207 183 193 7 209 55 161 184 81 211 33 210 251 118 93 188 152 238 91 172 169 10 45 42 215 164 122 109 206 52 158 190 11 139 218 159 255 74 165 191 51 2 4 6 2 4 8 80 171 7 51 2 4 6 2 4 8 85 167 95 162 58 192
Leaving ISR
And from there on the junk is consistently present, sometimes the original packet isn't even in the RX FIFO, i.e. the ISR was triggered by junk.
NOTE: I release the appended bytes (in green above) are meant to be there as they are the LQI and RSSI info.
I'm lost for what to try next so if anyone has any ideas I would greatly appreciate it !
Sorry about the post length
Regards,
Jay Long