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CC1175 FHSS Timing Problem

Zuy Ho
Prodigy 120 points
Other Parts Discussed in Thread: CC1175

Dear Sir

I used the Frequency Sweep function in SmartRF to check the FHSS speed of the CC1175.

It is hopping between two frequency 920MHz & 923MHz with dwell time setting = 500ms and 100ms.

It is checked by spectrum in 920MHz with 0 span.

The hopping speed is acceptable with dwell time = 500ms.

But there has a 45ms unexpected Tx occur on 152.5ms before the expected Tx. Please check the picture.

The hopping speed is totally unacceptable with dwell time =100ms (or smaller than 250ms). Please check the picture.

The number of Tx with dwell time = 100ms within 1s should be about >=4 in 920MHz but there only has 2. The 45ms unexpected Tx also occurred here.

I tested with smaller dwell time setting and found out the minimum effective dwell time is about 60ms.

In the CC1175 specification, the Idle to Tx time is just 461us with calibration enabled. So the effective dwell time can be set with much smaller than 60ms. Such as 10ms or smaller.

How to eliminate the 45ms unexpected Tx during frequency hopping?

Is it the FHSS performance limitation of the CC1175?

Is the limitation due to the manual calibration in the errata?

How fast of the FHSS on CC1175 can be run (no. of hopping per second)?

I want to use the CC1175  to run with the 1st 25ms TX with F1 and 60ms Idle --> 2nd 25ms TX with F2 and 60ms Idle -->  3rd 25ms TX with F3 and 60ms Idle --> 4th 25ms TX with F4 and 60ms Idle --> For Loop....

Is CC1175 fulfill our application?

Best regards,

Zuy Ho

  • 0
    TI__Mastermind 39860 points

    The Frequency Sweep function in Studio is not intended for testing FHSS functionality.

    Section 10.3 in the CC112x/CC1175 User Guide (www.ti.com/lit/swru295) for details on FHSS implementation.

    When going from one channel to the next there are two options

    a) TX1 -> IDLE -> CALIBRATION of next channel according to Errata-> IDLE to TX2 without calibration 

    b) TX1 -> IDLE -> write calibration values from look-up table -> IDLE to TX2 without calibration 

    TX to IDLE time is 0

    CALIBRATION according to Errata (VERSION 2.1 of the chip) is approx 800 us

    IDLE to TX time without calibration is 166 us

  • 0 in reply to Sverre
    Prodigy 120 points

    Hi Sverre

    In our measurement, the time taken for the errata manual calibration routine is about 2ms with PIC MCU PIC16LF1786@32MHz.
    The major delay is from step 3 to step 4 and step 7 to step 8 of the errata manual calibration routine.
    The MCU need to wait until MARCSTATE == 0x41. Only these 2 steps take more than 1ms in total.
    Is 2ms reasonable for the errata manual calibration routine?
    How can we make it close to 0.8ms as you said?
    Our reference code is the  "cc112x_easy_link_tx.c "
    Our assembly routines is following the steps of void manualCalibration(void)
    Best regards,
    Zuy Ho
  • 0 in reply to Zuy Ho
    TI__Guru* 79361 points

    The calibration time is 391 us according to the data sheet. This time is multiplied by 2 since the calibration is done twice and in addition you have the time it takes to send the SCAL strobe over SPI.

    In the calibration routine there are two strobe command and then reading and writing of 7 registers. If all these registers are in extended memory space it takes 3 bytes per register to read/write.

    This means that a total of 2 + 2*7*3 =44 bytes are sent over SPI. Assume a SPI speed of 1 MHz. This means that it takes 1/1000000 * 44 * 8 = 352 us.

    Depending on you SPI speed and how your SPI routines are written it is not unlikely that the complete calibration routine takes about 2 ms.

    To better understand why the calibration takes so long I recommend that you monitor the SPI interface during the calibration routine to see how long it takes. I know that there are a lot over overhead in the SPI functions in the example code as this code is written so that is will work for both single and burst access to extended and regular memory space.

    BR

    Siri