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CC110L can not send data (GDO0 pin problem)

Other Parts Discussed in Thread: CC110L, TEST2

hi guys !

i am trying to send and receive a byte by using cc110ldk_em_433 and MSP-EXP430F559

by now i can config cc110l via spi

i wroted value to registers and read them. so i think i configed cc110l truthly

i use smartstudio to get vale for each register

problem is cc110l can not send data (GDO0 not change , althought i set IOCFG0 =0x06

this my code

void RFSendPacket(char *txBuffer, char size)
{
    //TI_CC_GDO0_PxIE &= ~TI_CC_GDO0_PIN;
  TI_CC_SPIWriteBurstReg(TI_CCxxx0_TXFIFO, txBuffer, size); // Write TX data
  TI_CC_SPIStrobe(TI_CCxxx0_STX);           // Change state to TX, initiating
                                            // data transfer

  while (!(TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN));while (TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN);
   //_delay_cycles(15000);


  TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN;
  TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN;      // After pkt TX, this flag is set.
                                            // Has to be cleared before existing
}

fullcode i'll upload later (my company's internet doesnt allow upload anything)

please help. thanks

sory for bad english

  • Hi

    Could you please post the register settings you are using.

    try the following steps to verify that your code does what its intended to do:

    1. Read back some of the registers that you have changed from their default value to verify that the register value has in fact ben changed.
    2. Hardwire the GDO0 to one and zero to verify that you can read the GDO correctly
    3. After you have written to the TXFIFO, read the TXBYTES register to check that the FIFO contains valid data.
    4. After strobing TX check the MARCSTATE to see if the does not go into an error state due to FIFO error condition. You can also monitor the PA_PD signal to check that the radio goes into TX.
  • hi martin!

    thanks for your reply

    here is my registers setting

    void writeRFSettings(void)
    {
            //TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG2,   0x0B); // GDO2 output pin config.
            TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0,   0x06); // GDO0 output pin config.
            TI_CC_SPIWriteReg(TI_CCxxx0_FIFOTHR,   0x47);
            //TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN,   0xFF); // Packet length.
            //TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x05); // Packet automation control.
            TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05); // Packet automation control.
            TI_CC_SPIWriteReg(TI_CCxxx0_ADDR,     0x01); // Device address.
            //TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR,   0x01); // Channel number.
            TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1,  0x06); // Freq synthesizer control.
            //TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0,  0x00); // Freq synthesizer control.
            TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2,    0x10); // Freq control word, high byte
            TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1,    0xB1); // Freq control word, mid byte.
            TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0,    0x3B); // Freq control word, low byte.
            TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4,  0xF6); // Modem configuration.
            TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3,  0x83); // Modem configuration.
            TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2,  0x13); // Modem configuration.
            //TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1,  0x22); // Modem configuration.
            //TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0,  0xF8); // Modem configuration.
            TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN,  0x15); // Modem dev (when FSK mod en)
            //TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 ,   0x3F); //MainRadio Cntrl State Machine
            TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 ,   0x18); //MainRadio Cntrl State Machine
            TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG,   0x16); // Freq Offset Compens. Config
            //TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG,    0x1C); //  Bit synchronization config.
            //TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0xC7); // AGC control.
            //TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x00); // AGC control.
            //TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0xB2); // AGC control.
            TI_CC_SPIWriteReg(TI_CCxxx0_WORCTRL,0xFB);
            //TI_CC_SPIWriteReg(TI_CCxxx0_FREND1,   0xB6); // Front end RX configuration.
            //TI_CC_SPIWriteReg(TI_CCxxx0_FREND0,   0x10); // Front end RX configuration.
            TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3,   0xE9); // Frequency synthesizer cal.
            TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2,   0x2A); // Frequency synthesizer cal.
            TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1,   0x00); // Frequency synthesizer cal.
            TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0,   0x1F); // Frequency synthesizer cal.
            //TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST29,   0x59); // Frequency synthesizer cal.
            //TI_CC_SPIWriteReg(TI_CCxxx0_PTEST2A,
            //TI_CC_SPIWriteReg(TI_CCxxx0_AGCTEST2B
            TI_CC_SPIWriteReg(TI_CCxxx0_TEST2,    0x81); // Various test settings.
            TI_CC_SPIWriteReg(TI_CCxxx0_TEST1,    0x35); // Various test settings.
            TI_CC_SPIWriteReg(TI_CCxxx0_TEST0,    0x09); // Various test settings.

    }

    i checked value of the 30 firts register (form 0x00 to 0x1D), and this is ok

    i read TXBYTE and got value 0 .this is mycode

    void RFSendPacket(char *txBuffer, char size)
    {
        //TI_CC_GDO0_PxIE &= ~TI_CC_GDO0_PIN;
      TI_CC_SPIWriteBurstReg(TI_CCxxx0_TXFIFO, txBuffer, size); // Write TX data
      sprintf(strc,"%d",TI_CC_SPIReadReg(0x3A));
      Dogs102x6_stringDraw(4,0,strc,DOGS102x6_DRAW_NORMAL);
      TI_CC_SPIStrobe(TI_CCxxx0_STX);           // Change state to TX, initiating
                                                // data transfer

      sprintf(strc,"%d",TI_CC_SPIReadReg(0x3A));
      Dogs102x6_stringDraw(5,0,strc,DOGS102x6_DRAW_NORMAL);
      while (!(TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN));
       //_delay_cycles(15000);
      Dogs102x6_charDraw(6,0,'A',DOGS102x6_DRAW_NORMAL);
      while (TI_CC_GDO0_PxIN&TI_CC_GDO0_PIN);

      TI_CC_GDO0_PxIE |= TI_CC_GDO0_PIN;
      TI_CC_GDO0_PxIFG &= ~TI_CC_GDO0_PIN;      // After pkt TX, this flag is set.
                                                // Has to be cleared before existing
    }

    void TI_CC_SPIWriteBurstReg(char addr, char *buffer, char count)
    {
      unsigned int i;

      TI_CC_CSn_PxOUT &= ~TI_CC_CSn_PIN;        // /CS enable
      while (!(UCB0IFG&UCTXIFG));               // Wait for TXBUF ready
      UCB0TXBUF = addr | TI_CCxxx0_WRITE_BURST; // Send address(TI_CCxxx0_WRITE_BURST=0x40)
      for (i = 0; i < count; i++)
      {
        while (!(UCB0IFG&UCTXIFG));               // Wait for TXBUF ready
        UCB0TXBUF = buffer[i];                  // Send data
      }
      while (UCB0STAT & UCBUSY);                // Wait for TX to complete
      TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN;         // /CS disable
    }

    i uploaded my full code.

    thanks for helping me

    code.rar
  • Hi

    When do you read the TXSTATUS ? You have to read it between writing to the TXFIFO and before you strobe TX. If it is zero between these operations the FIFO is empty when you strobe TX and the radio will go into a FIFO UNDERFLOW error state.

  • so. how i can make it run? just read the txstatus?

  • you mean txstatus  or txbyte? i can not find register TXSTATUS

  • Sorry, my mistake. I meant TXBYTES. You need to verify that  the TXFIFO contains the packet you want to send.

  • i checked txbyte at address 0x3F and got value 0 :(

  • The TXBYTES register has address 0xFA. Reading from address 0x3F will be the RXFIFO.

  • sory.

    i read at address 0x3A

    in cc110l datasheet. i read that TXBYTE 0x3A (0xFA ) i dont know 3A or FA is right.

    so what should i do if i get the wrong value ?

  • You need to reed at 0xFA. The command strobe and status bytes (as TXBYTES is) share address. The way this works is when you do a single byte read or single byte write to in this case address 0x3F you will actually send a SFRX command strobe. To read the status byte at the same address in this case TXBYTES, you need to do a burst read, bit 7 and 6 set to one, hence you need to send 0xFA over the SPI.

  • Hi Anh, I came across this post as I'm trying to get through some cc110l debugging myself.

    You have probably already fixed this issue but for the sake of making this thread a little more complete I'll add my comments here.

    As I'm sure you know, all of the configuration registers have one command for read and one for write. The first bit of the byte you send the CC110L determines if it's a read operation or a write operation.

    The second bit determines if it's a burst operation.

    #define READ 0x80
    #define BURST 0x40
    #define TXBYTES 0x3A

    so to read the register you need to send the command
    READ | TXBYTES = 0x80 | 0x3A : 0xBA

    I don't believe the BURST bit is necessary but it doesn't hurt to use it as well
    READ | BURST | TXBYTES = 0x80 | 0x40 | 0x3A : 0xFA

    To write to this register just use 0x3A

    Note: I've been unable to make good use of the TXBYTES register, I've checked it before and after writing data to the TXFIFO and the response hasn't been as expected, I get what looks to be the final 4 digits of the chip status byte (which tells you if there is open space in the FIFO)