Frequency Shift CC1200

The carrier frequency is derived from the reference clock (crystal or TCXO) and any error in the reference clock in ppm will yield the same error in ppm in the carrier frequency.

A TCXO is typically very accurate; a few ppm so I am surprised you get as much as 20 kHz offset from the ideal (20 kHz at 437 MHz is roughly 45 ppm).

Even a crystal does not have this kind off error unless the capacitive loading is way off. The eval board will have an offset from idea (initial tolerance and capacitive loading)l, but not more than 10 kHz - probably less. 

Are you sure you are measuring the carrier frequency when using the TCXO? You get the register settings for an unmodulated carrier from SmartRF Studio. One explanation could be that you transmit a logic '1' and that you are measuring carrier + frequency deviation. 

I've attached my register settings for the boards. I was measuring all the frequencies in their signal spectrum, using a Spectrum Analyser.

The result was exactly: (-dev, carrier, +dev) 

EVA:          437.49322 ---- 437.49721 ---- 437.50120 MHz

myBoard: 437.51398 ---- 437.51797 ---- 437.52156 MHz

According to the data-sheet of TCXO, it should have an accuracy of 1ppm... If the TCXO wasn't working, sending shouldn't be possible at all, right? So it's strange...

(please don't wonder if  this config file uses another dev.-configuration than the measurement above)

struct CONFIG CONFIG_1_2_MSK = {{
    0x0000, 0x19,		// IOCFG3             (GPIO3 IO PIN CONFIGURATION)
    0x0001, 0x19,       // IOCFG2             (GPIO2 IO PIN CONFIGURATION)
    0x0002, 0x30,       // IOCFG1             (GPIO1 IO PIN CONFIGURATION)
    0x0003, 0x3C,       // IOCFG0             (GPIO0 IO PIN CONFIGURATION)
    0x0004, 0x93,       // SYNC3              (SYNC WORD CONFIGURATION [31:24])
    0x0005, 0x0B,       // SYNC2              (SYNC WORD CONFIGURATION [23:16])
    0x0006, 0x51,       // SYNC1              (SYNC WORD CONFIGURATION [15:8])
    0x0007, 0xDE,       // SYNC0              (SYNC WORD CONFIGURATION [7:0])
    0x0008, 0xA8,       // SYNC_CFG1          (SYNC WORD DETECTION CONFIGURATION REG. 1)
    0x0009, 0x03,       // SYNC_CFG0          (SYNC WORD DETECTION CONFIGURATION REG. 0)
    0x000A, 0x68,       // DEVIATION_M        (FREQUENCY DEVIATION CONFIGURATION)		
    0x000B, 0x08,       // MODCFG_DEV_E       (MODULATION FORMAT AND FREQUENCY DEVIATION CONFIGUR..)
    0x000C, 0x5D,       // DCFILT_CFG         (DIGITAL DC REMOVAL CONFIGURATION)
    0x000D, 0x14,       // PREAMBLE_CFG1      (PREAMBLE LENGTH CONFIGURATION REG. 1)
    0x000E, 0x8A,       // PREAMBLE_CFG0      (PREAMBLE DETECTION CONFIGURATION REG. 0)
    0x000F, 0xCB,       // IQIC               (DIGITAL IMAGE CHANNEL COMPENSATION CONFIGURATION)
    0x0010, 0xA6,       // CHAN_BW            (CHANNEL FILTER CONFIGURATION)
    0x0011, 0x40,       // MDMCFG1            (GENERAL MODEM PARAMETER CONFIGURATION REG. 1)
    0x0012, 0x05,       // MDMCFG0            (GENERAL MODEM PARAMETER CONFIGURATION REG. 0)
    0x0013, 0x3F,       // SYMBOL_RATE2       (SYMBOL RATE CONFIGURATION EXPONENT AND MANTISSA [1..)
    0x0014, 0x75,       // SYMBOL_RATE1       (SYMBOL RATE CONFIGURATION MANTISSA [15:8])
    0x0015, 0x10,       // SYMBOL_RATE0       (SYMBOL RATE CONFIGURATION MANTISSA [7:0])
    0x0016, 0x20,       // AGC_REF            (AGC REFERENCE LEVEL CONFIGURATION)
    0x0017, 0xEC,       // AGC_CS_THR         (CARRIER SENSE THRESHOLD CONFIGURATION)
    0x0018, 0x00,       // AGC_GAIN_ADJUST    (RSSI OFFSET CONFIGURATION)
    0x0019, 0xB1,       // AGC_CFG3           (AUTOMATIC GAIN CONTROL CONFIGURATION REG. 3)
    0x001A, 0x20,       // AGC_CFG2           (AUTOMATIC GAIN CONTROL CONFIGURATION REG. 2)
    0x001B, 0x51,       // AGC_CFG1           (AUTOMATIC GAIN CONTROL CONFIGURATION REG. 1)
    0x001C, 0x87,       // AGC_CFG0           (AUTOMATIC GAIN CONTROL CONFIGURATION REG. 0)
    0x001D, 0x00,       // FIFO_CFG           (FIFO CONFIGURATION)
    0x001E, 0x00,       // DEV_ADDR           (DEVICE ADDRESS CONFIGURATION)
    0x001F, 0x0B,       // SETTLING_CFG       (FREQUENCY SYNTHESIZER CALIBRATION AND SETTLING CON..)
    0x0020, 0x14,       // FS_CFG             (FREQUENCY SYNTHESIZER CONFIGURATION)
    0x0026, 0x00,       // PKT_CFG2           (PACKET CONFIGURATION REG. 2)
    0x0027, 0x03,       // PKT_CFG1           (PACKET CONFIGURATION REG. 1)
    0x0028, 0x20,       // PKT_CFG0           (PACKET CONFIGURATION REG. 0)
    0x0029, 0x0F,       // RFEND_CFG1         (RFEND CONFIGURATION REG. 1)
    0x002A, 0x00,       // RFEND_CFG0         (RFEND CONFIGURATION REG. 0)
    0x002B, 0x7A,       // PA_CFG1            (POWER AMPLIFIER CONFIGURATION REG. 1)
    0x002C, 0x56,       // PA_CFG0            (POWER AMPLIFIER CONFIGURATION REG. 0)
    0x002D, 0x0F,       // ASK_CFG            (ASK CONFIGURATION)
    0x002E, 0xFF,       // PKT_LEN            (PACKET LENGTH CONFIGURATION)
    0x2F00, 0x1C,       // IF_MIX_CFG         (IF MIX CONFIGURATION)
    0x2F01, 0x32,       // FREQOFF_CFG        (FREQUENCY OFFSET CORRECTION CONFIGURATION)
    0x2F02, 0x4B,       // TOC_CFG		 (TIMING OFFSET CORRECTION CONFIGURATION)
    0x2F05, 0x0C,       // MDMCFG2            (GENERAL MODEM PARAMETER CONFIGURATION REG. 2)
    0x2F0A, 0x00,       // FREQOFF1           (FREQUENCY OFFSET MSB)
    0x2F0B, 0x00,       // FREQOFF0           (FREQUENCY OFFSET LSB)
    0x2F0C, 0x57,       // FREQ2              (FREQUENCY CONFIGURATION [23:16])
    0x2F0D, 0x80,       // FREQ1              (FREQUENCY CONFIGURATION [15:8])
    0x2F0E, 0x00,       // FREQ0              (FREQUENCY CONFIGURATION [7:0])
    0x2F0F, 0x02,       // IF_ADC2            (ANALOG TO DIGITAL CONVERTER CONFIGURATION REG. 2)
    0x2F10, 0xEE,       // IF_ADC1            (ANALOG TO DIGITAL CONVERTER CONFIGURATION REG. 1)
    0x2F11, 0x10,       // IF_ADC0            (ANALOG TO DIGITAL CONVERTER CONFIGURATION REG. 0)
    0x2F12, 0x07,       // FS_DIG1            (FREQUENCY SYNTHESIZER DIGITAL REG. 1)
    0x2F13, 0xAF,       // FS_DIG0            (FREQUENCY SYNTHESIZER DIGITAL REG. 0)
    0x2F14, 0x00,       // FS_CAL3            (FREQUENCY SYNTHESIZER CALIBRATION REG. 3)
    0x2F15, 0x20,       // FS_CAL2            (FREQUENCY SYNTHESIZER CALIBRATION REG. 2)
    0x2F16, 0x40,       // FS_CAL1            (FREQUENCY SYNTHESIZER CALIBRATION REG. 1)
    0x2F17, 0x0E,       // FS_CAL0            (FREQUENCY SYNTHESIZER CALIBRATION REG. 0)
    0x2F18, 0x28,       // FS_CHP             (FREQUENCY SYNTHESIZER CHARGE PUMP CONFIGURATION)
    0x2F19, 0x03,       // FS_DIVTWO          (FREQUENCY SYNTHESIZER DIVIDE BY 2)
    0x2F1A, 0x00,       // FS_DSM1            (FS DIGITAL SYNTHESIZER MODULE CONFIGURATION REG. 1)
    0x2F1B, 0x33,       // FS_DSM0            (FS DIGITAL SYNTHESIZER MODULE CONFIGURATION REG. 0)
    0x2F1C, 0xFF,       // FS_DVC1            (FREQUENCY SYNTHESIZER DIVIDER CHAIN CONFIGURATION ..)
    0x2F1D, 0x17,       // FS_DVC0            (FREQUENCY SYNTHESIZER DIVIDER CHAIN CONFIGURATION ..)
    0x2F1F, 0x00,       // FS_PFD             (FREQUENCY SYNTHESIZER PHASE FREQUENCY DETECTOR CON..)
    0x2F20, 0x6E,       // FS_PRE             (FREQUENCY SYNTHESIZER PRESCALER CONFIGURATION)
    0x2F21, 0x1C,       // FS_REG_DIV_CML     (FREQUENCY SYNTHESIZER DIVIDER REGULATOR CONFIGURAT..)
    0x2F22, 0xAC,       // FS_SPARE           (FREQUENCY SYNTHESIZER SPARE)
    0x2F23, 0x14,       // FS_VCO4            (FS VOLTAGE CONTROLLED OSCILLATOR CONFIGURATION REG..)
    0x2F24, 0x00,       // FS_VCO3            (FS VOLTAGE CONTROLLED OSCILLATOR CONFIGURATION REG..)
    0x2F25, 0x00,       // FS_VCO2            (FS VOLTAGE CONTROLLED OSCILLATOR CONFIGURATION REG..)
    0x2F26, 0x00,       // FS_VCO1            (FS VOLTAGE CONTROLLED OSCILLATOR CONFIGURATION REG..)
    0x2F27, 0xB5,       // FS_VCO0            (FS VOLTAGE CONTROLLED OSCILLATOR CONFIGURATION REG..)
    0x2F2F, 0x01,       // IFAMP              (INTERMEDIATE FREQUENCY AMPLIFIER CONFIGURATION)
    0x2F30, 0x01,       // LNA                (LOW NOISE AMPLIFIER CONFIGURATION)
    0x2F32, 0x0E,       // XOSC5              (CRYSTAL OSCILLATOR CONFIGURATION REG. 5)
    0x2F33, 0xA0,       // XOSC4              (CRYSTAL OSCILLATOR CONFIGURATION REG. 4)
    0x2F34, 0x03,       // XOSC3              (CRYSTAL OSCILLATOR CONFIGURATION REG. 3)
    0x2F35, 0x04,       // XOSC2              (CRYSTAL OSCILLATOR CONFIGURATION REG. 2)
    0x2F36, 0x03,       // XOSC1              (CRYSTAL OSCILLATOR CONFIGURATION REG. 1)
    0x2F37, 0x00,       // XOSC0              (CRYSTAL OSCILLATOR CONFIGURATION REG. 0)
}};

Hi,

TCXOs are normally very stable.

I would test with an un-modulated carrier when measuring the frequency offset.

Can you swap the TCXO between the EM and your board to see if the error follows the TCXO or not ?

Regards,

   Richard