CC1120 communicate with cc430f6137

Can Chen1

Other Parts Discussed in Thread: CC1101, CC1120, CC430F6137, TEST2

Hi,

When I configured the registers of CC1120 and CC1101, the CC1120 still cannot communicate with the chronos watch which uses cc430f6137 mcu.

I configured the frequency, preamble, sync, Rx filter Bw, data rate, packet length, address, frequency deviation, the mode of modulation.

Here are my cofigurations:

/***************************************************************

* SmartRF Studio(tm) Export

* Radio register settings specifed with C-code

* compatible #define statements.

* RF device: CC1120

***************************************************************/

#ifndef SMARTRF_CC1120_H

#define SMARTRF_CC1120_H

#define SMARTRF_RADIO_CC1120

#define SMARTRF_SETTING_IOCFG3 0xB0

#define SMARTRF_SETTING_IOCFG2 0x06

#define SMARTRF_SETTING_IOCFG1 0xB0

#define SMARTRF_SETTING_IOCFG0 0x40

#define SMARTRF_SETTING_SYNC_CFG1 0x0B

#define SMARTRF_SETTING_DEVIATION_M 0x38

#define SMARTRF_SETTING_MODCFG_DEV_E 0x05

#define SMARTRF_SETTING_DCFILT_CFG 0x1C

#define SMARTRF_SETTING_PREAMBLE_CFG1 0x18

#define SMARTRF_SETTING_IQIC 0x46

#define SMARTRF_SETTING_CHAN_BW 0x02

#define SMARTRF_SETTING_MDMCFG0 0x05

#define SMARTRF_SETTING_SYMBOL_RATE2 0x93

#define SMARTRF_SETTING_SYMBOL_RATE1 0x73

#define SMARTRF_SETTING_SYMBOL_RATE0 0x02

#define SMARTRF_SETTING_AGC_REF 0x20

#define SMARTRF_SETTING_AGC_CS_THR 0x19

#define SMARTRF_SETTING_AGC_CFG1 0xA9

#define SMARTRF_SETTING_AGC_CFG0 0xCF

#define SMARTRF_SETTING_FIFO_CFG 0x00

#define SMARTRF_SETTING_SETTLING_CFG 0x03

#define SMARTRF_SETTING_FS_CFG 0x14

#define SMARTRF_SETTING_PKT_CFG0 0x20

#define SMARTRF_SETTING_PA_CFG2 0x3F

#define SMARTRF_SETTING_PA_CFG0 0x7B

#define SMARTRF_SETTING_PKT_LEN 0xFF

#define SMARTRF_SETTING_IF_MIX_CFG 0x00

#define SMARTRF_SETTING_FREQOFF_CFG 0x22

#define SMARTRF_SETTING_FREQ2 0x6C

#define SMARTRF_SETTING_FREQ1 0x80

#define SMARTRF_SETTING_FS_DIG1 0x00

#define SMARTRF_SETTING_FS_DIG0 0x5F

#define SMARTRF_SETTING_FS_CAL1 0x40

#define SMARTRF_SETTING_FS_CAL0 0x0E

#define SMARTRF_SETTING_FS_CHP 0x27

#define SMARTRF_SETTING_FS_DIVTWO 0x03

#define SMARTRF_SETTING_FS_DSM0 0x33

#define SMARTRF_SETTING_FS_DVC0 0x17

#define SMARTRF_SETTING_FS_PFD 0x50

#define SMARTRF_SETTING_FS_PRE 0x6E

#define SMARTRF_SETTING_FS_REG_DIV_CML 0x14

#define SMARTRF_SETTING_FS_SPARE 0xAC

#define SMARTRF_SETTING_FS_VCO4 0x18

#define SMARTRF_SETTING_FS_VCO1 0x9C

#define SMARTRF_SETTING_FS_VCO0 0xB4

#define SMARTRF_SETTING_XOSC5 0x0E

#define SMARTRF_SETTING_XOSC1 0x03

#define SMARTRF_SETTING_DCFILTOFFSET_I1 0x01

#define SMARTRF_SETTING_DCFILTOFFSET_I0 0xFB

#define SMARTRF_SETTING_DCFILTOFFSET_Q1 0x05

#define SMARTRF_SETTING_DCFILTOFFSET_Q0 0xD2

#define SMARTRF_SETTING_RSSI1 0xFD

#define SMARTRF_SETTING_RSSI0 0x43

#define SMARTRF_SETTING_PQT_SYNC_ERR 0x6F

#define SMARTRF_SETTING_FREQOFF_EST1 0xFF

#define SMARTRF_SETTING_FREQOFF_EST0 0x3D

#define SMARTRF_SETTING_AGC_GAIN3 0x20

#define SMARTRF_SETTING_AGC_GAIN2 0xAA

#define SMARTRF_SETTING_AGC_GAIN1 0x14

#define SMARTRF_SETTING_MAGN0 0x80

#define SMARTRF_SETTING_ANG1 0x02

#define SMARTRF_SETTING_ANG0 0xBE

#define SMARTRF_SETTING_CHFILT_I2 0x0F

#define SMARTRF_SETTING_CHFILT_I1 0xFF

#define SMARTRF_SETTING_CHFILT_I0 0xE3

#define SMARTRF_SETTING_CHFILT_Q2 0x07

#define SMARTRF_SETTING_CHFILT_Q1 0xFF

#define SMARTRF_SETTING_CHFILT_Q0 0xB3

#define SMARTRF_SETTING_PARTNUMBER 0x48

#define SMARTRF_SETTING_PARTVERSION 0x21

#define SMARTRF_SETTING_MODEM_STATUS1 0x11

#endif

And here is the configurations for cc1101:

// Address config = No address check

// CRC autoflush = false

// Base frequency = 433.999573

// Sync word qualifier mode = 30/32 sync word bits detected

// Manchester enable = false

// Packet length mode = Variable packet length mode. Packet length configured by the first byte after sync word

// Modulation format = 2-FSK

// RX filter BW = 101.562500

// Device address = 0

// Carrier frequency = 433.999573

// Whitening = false

// Packet length = 61

// Data rate = 37.9868

// Preamble count = 4

// PA ramping = false

// Data format = Normal mode

// TX power = 0

// CRC enable = true

// Channel spacing = 199.951172

// Channel number = 0

// Deviation = 19.042969

// Modulated = true

// Rf settings for CC1101

RF_SETTINGS code rfSettings = {

0x06, // IOCFG0 GDO0 Output Pin Configuration

0x47, // FIFOTHR RX FIFO and TX FIFO Thresholds

0x3D, // PKTLEN Packet Length

0x05, // PKTCTRL0 Packet Automation Control

0x06, // FSCTRL1 Frequency Synthesizer Control

0x10, // FREQ2 Frequency Control Word, High Byte

0xB1, // FREQ1 Frequency Control Word, Middle Byte

0x3A, // FREQ0 Frequency Control Word, Low Byte

0xCA, // MDMCFG4 Modem Configuration

0x7F, // MDMCFG3 Modem Configuration

0x03, // MDMCFG2 Modem Configuration

0x34, // DEVIATN Modem Deviation Setting

0x18, // MCSM0 Main Radio Control State Machine Configuration

0x16, // FOCCFG Frequency Offset Compensation Configuration

0xFB, // WORCTRL Wake On Radio Control

0xE9, // FSCAL3 Frequency Synthesizer Calibration

0x2A, // FSCAL2 Frequency Synthesizer Calibration

0x00, // FSCAL1 Frequency Synthesizer Calibration

0x1F, // FSCAL0 Frequency Synthesizer Calibration

0x81, // TEST2 Various Test Settings

0x35, // TEST1 Various Test Settings

0x09, // TEST0 Various Test Settings

};

Preamble is 4 bytes 0xAA,0xAA,0xAA,0xAA. SYNC is 4 bytes 0xD391D391.

Q1:I wonder if I had forgot anything to configure or is there anything which I configured wrong?

Q2: Does CRC need to be configured? Or it is automatically configured?

Q3: I have tried modifying the Tx Power to be the same, but it didn't work. So is thers any need to configure it the same with each other?

Please help.

Regards,

Can

over 9 years ago

0 TER over 9 years ago

TI__Guru**** 317180 points

Do you use default sync on CC1120? Note that you have to have the same sync word on CC1120 and CC430 to get it to work.

0 Can Chen1 over 9 years ago in reply to TER

Intellectual 560 points

Hi TER,

Thanks for replying!

Yes, I used the same sync word which is 4 bytes long. That is 0xD391,0xD391.

So, I want to know what should I to do?

Regards,

Can

0 TER over 9 years ago in reply to Can Chen1

TI__Guru**** 317180 points

Is it CC1120 to CC430 or the other way that is the issue?

Note that the CC1120 AGC settings are not optimal, start with the 38.4 kbps example in SmartRF Studio. Ensure that the CC430 not saturates with a strong signal in.

Where have you defined the sync word? Why are not those exported together with the other settings?

0 Can Chen1 over 9 years ago in reply to TER

Intellectual 560 points

Hi,

I do not know where is the issue is the question.

And my SYNC word is

#define SMARTRF_RADIO_CC1101

#define SMARTRF_SETTING_IOCFG2 0x29

#define SMARTRF_SETTING_IOCFG1 0x2E

#define SMARTRF_SETTING_IOCFG0 0x06

#define SMARTRF_SETTING_FIFOTHR 0x47

#define SMARTRF_SETTING_SYNC1 0xD3

#define SMARTRF_SETTING_SYNC0 0x91

#define SMARTRF_SETTING_PKTLEN 0xFF

#define SMARTRF_SETTING_PKTCTRL1 0x04

#define SMARTRF_SETTING_PKTCTRL0 0x05

#define SMARTRF_SETTING_ADDR 0x00

#define SMARTRF_SETTING_CHANNR 0x00

#define SMARTRF_SETTING_FSCTRL1 0x06

#define SMARTRF_SETTING_FSCTRL0 0x00

#define SMARTRF_SETTING_FREQ2 0x10

#define SMARTRF_SETTING_FREQ1 0xBB

#define SMARTRF_SETTING_FREQ0 0x13

#define SMARTRF_SETTING_MDMCFG4 0xCA

#define SMARTRF_SETTING_MDMCFG3 0x7F

#define SMARTRF_SETTING_MDMCFG2 0x03

#define SMARTRF_SETTING_MDMCFG1 0x22

#define SMARTRF_SETTING_MDMCFG0 0xF8

#define SMARTRF_SETTING_DEVIATN 0x34

#define SMARTRF_SETTING_MCSM2 0x07

#define SMARTRF_SETTING_MCSM1 0x30

#define SMARTRF_SETTING_MCSM0 0x18

#define SMARTRF_SETTING_FOCCFG 0x16

#define SMARTRF_SETTING_BSCFG 0x6C

#define SMARTRF_SETTING_AGCCTRL2 0x03

#define SMARTRF_SETTING_AGCCTRL1 0x40

#define SMARTRF_SETTING_AGCCTRL0 0x91

#define SMARTRF_SETTING_WOREVT1 0x87

#define SMARTRF_SETTING_WOREVT0 0x6B

#define SMARTRF_SETTING_WORCTRL 0xFB

#define SMARTRF_SETTING_FREND1 0x56

#define SMARTRF_SETTING_FREND0 0x10

#define SMARTRF_SETTING_FSCAL3 0xE9

#define SMARTRF_SETTING_FSCAL2 0x2A

#define SMARTRF_SETTING_FSCAL1 0x00

#define SMARTRF_SETTING_FSCAL0 0x1F

#define SMARTRF_SETTING_RCCTRL1 0x41

#define SMARTRF_SETTING_RCCTRL0 0x00

#define SMARTRF_SETTING_FSTEST 0x59

#define SMARTRF_SETTING_PTEST 0x7F

#define SMARTRF_SETTING_AGCTEST 0x3F

#define SMARTRF_SETTING_TEST2 0x81

#define SMARTRF_SETTING_TEST1 0x35

#define SMARTRF_SETTING_TEST0 0x09

#define SMARTRF_SETTING_PARTNUM 0x00

#define SMARTRF_SETTING_VERSION 0x04

#define SMARTRF_SETTING_FREQEST 0x00

#define SMARTRF_SETTING_LQI 0x00

#define SMARTRF_SETTING_RSSI 0x00

#define SMARTRF_SETTING_MARCSTATE 0x00

#define SMARTRF_SETTING_WORTIME1 0x00

#define SMARTRF_SETTING_WORTIME0 0x00

#define SMARTRF_SETTING_PKTSTATUS 0x00

#define SMARTRF_SETTING_VCO_VC_DAC 0x00

#define SMARTRF_SETTING_TXBYTES 0x00

#define SMARTRF_SETTING_RXBYTES 0x00

#define SMARTRF_SETTING_RCCTRL1_STATUS 0x00

#define SMARTRF_SETTING_RCCTRL0_STATUS 0x00

#ifndef SMARTRF_CC1120_H

#define SMARTRF_CC1120_H

#define SMARTRF_RADIO_CC1120

#define SMARTRF_SETTING_IOCFG3 0xB0

#define SMARTRF_SETTING_IOCFG2 0x06

#define SMARTRF_SETTING_IOCFG1 0xB0

#define SMARTRF_SETTING_IOCFG0 0x40

#define SMARTRF_SETTING_SYNC3 0xD3

#define SMARTRF_SETTING_SYNC2 0x91

#define SMARTRF_SETTING_SYNC1 0xD3

#define SMARTRF_SETTING_SYNC0 0x91

#define SMARTRF_SETTING_SYNC_CFG1 0x0B

#define SMARTRF_SETTING_DEVIATION_M 0x37

#define SMARTRF_SETTING_MODCFG_DEV_E 0x05

#define SMARTRF_SETTING_DCFILT_CFG 0x1C

#define SMARTRF_SETTING_PREAMBLE_CFG1 0x18

#define SMARTRF_SETTING_IQIC 0x46

#define SMARTRF_SETTING_CHAN_BW 0x02

#define SMARTRF_SETTING_MDMCFG0 0x05

#define SMARTRF_SETTING_SYMBOL_RATE2 0x93

#define SMARTRF_SETTING_SYMBOL_RATE1 0x73

#define SMARTRF_SETTING_SYMBOL_RATE0 0x02

#define SMARTRF_SETTING_AGC_REF 0x20

#define SMARTRF_SETTING_AGC_CS_THR 0x19

#define SMARTRF_SETTING_AGC_CFG1 0xA9

#define SMARTRF_SETTING_AGC_CFG0 0xCF

#define SMARTRF_SETTING_FIFO_CFG 0x00

#define SMARTRF_SETTING_FS_CFG 0x14

#define SMARTRF_SETTING_PKT_CFG0 0x20

#define SMARTRF_SETTING_PA_CFG2 0x3F

#define SMARTRF_SETTING_PA_CFG0 0x7B

#define SMARTRF_SETTING_PKT_LEN 0xFF

#define SMARTRF_SETTING_IF_MIX_CFG 0x00

#define SMARTRF_SETTING_FREQOFF_CFG 0x22

#define SMARTRF_SETTING_FREQ2 0x6C

#define SMARTRF_SETTING_FREQ1 0x80

#define SMARTRF_SETTING_FS_DIG1 0x00

#define SMARTRF_SETTING_FS_DIG0 0x5F

#define SMARTRF_SETTING_FS_CAL1 0x40

#define SMARTRF_SETTING_FS_CAL0 0x0E

#define SMARTRF_SETTING_FS_DIVTWO 0x03

#define SMARTRF_SETTING_FS_DSM0 0x33

#define SMARTRF_SETTING_FS_DVC0 0x17

#define SMARTRF_SETTING_FS_PFD 0x50

#define SMARTRF_SETTING_FS_PRE 0x6E

#define SMARTRF_SETTING_FS_REG_DIV_CML 0x14

#define SMARTRF_SETTING_FS_SPARE 0xAC

#define SMARTRF_SETTING_FS_VCO0 0xB4

#define SMARTRF_SETTING_XOSC5 0x0E

#define SMARTRF_SETTING_XOSC1 0x03

0 TER over 9 years ago in reply to Can Chen1

TI__Guru**** 317180 points

I have tested a bit with a CC430 EM and a CC1120 EM and have no issues getting a link.

- Start with the 38.4 kbps setting for both chips. Change to the wanted modulation (FSK), datarate and deviation. From the settings it looks like you haven't started from the 38.4 kbps settings.
- Change sync word on CC1120
- Increase the packet interval to about 200 ms when CC1120 is used as sender. This because the SmartRF Studio interface to CC430 is slow.

When I did these changes I got a link both ways.

0 Can Chen1 over 9 years ago in reply to TER

Intellectual 560 points

Hi,

Thanks for testing the communication!

I have solved my problem! Whether to start with the 38.4kbps isn't a problem. It only need you set the same parameters!

Thanks anyway.

Sub-1 GHz

Sub-1 GHz forum

CC1120 communicate with cc430f6137