I have a project that use two CC430F5137, one is transmitter, the other one is receiver. I want to use transmitter to get data from ADC and transmit them to receiver while receiver get the data and send them to computer by UART.
There are some problems now; I want to find a register value or something else to tell the code in transmitter the data has been sent but I can't find it. More, sometimes I got a wrong data.
My code for Tx and Rx:
TX:
#include "../inc/RF_Toggle_LED_Demo.h"
#include <stdio.h>
// PACKET_LEN <= 61
#define PACKET_LEN (0x14)
#define PATABLE_VAL (0xc0)
extern RF_SETTINGS rfSettings;
unsigned int i = 0, RX=0;
unsigned char transmitting = 1;
unsigned int index = 2,j=0,m=0;
unsigned int TX=0,
unsigned char results[PACKET_LEN];
unsigned short result0;
void main( void )
{
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
// Increase PMMCOREV level to 2 for proper radio operation
SetVCore(2);
ResetRadioCore();
InitRadio();
InitADC();
_EINT();
delayms(1);
while (1)
{
__no_operation();
delayms(5);
ReceiveOff();
transmitting = 1;
__no_operation();
results[0]=PACKET_LEN;
results[1]=0x27;
for(index = 2;index<PACKET_LEN;)
{
result0 = ADC12MEM0;
results[index+0]=result0>>8; //high
results[index+1]=result0; //low
index=index+2;
delayms(1);
}
index = 2; // Reset the index;
_NOP();
Transmit( (unsigned char*)results,sizeof results);
TX++;
}
}
void InitADC(void)
{
P2SEL |= 0x01; //
//REFCTL0 |= REFMSTR + REFVSEL_0 + REFON + REFTCOFF; // Enable internal 1.5V reference
//ADC12CTL0 = ADC12ON+ADC12SHT0_2+ADC12MSC; // Turn on ADC12, set sampling time//A0//256 ADC12CLK——130Hz
// set multiple sample conversion
ADC12CTL0 = ADC12ON+ADC12SHT0_2+ADC12MSC;
ADC12CTL1 = ADC12SHP+ADC12CONSEQ_2;//one input repeat
/*
//ADC 3 channel
ADC12CTL1 = ADC12SHP+ADC12CONSEQ_3; // Use sampling timer, set mode//3-Sequence of Conversions
ADC12IE = 0x01; // Enable ADC12IFG.0 //Enable interrupt
ADC12MCTL0 = ADC12INCH_0; // ref+=AVcc, channel = A0
ADC12MCTL1 = ADC12INCH_1; // ref+=AVcc, channel = A1
ADC12MCTL2 = ADC12INCH_2+ADC12EOS; // ref+=AVcc, channel = A2
//ADC12MCTL3 = ADC12INCH_3; // ref+=AVcc, channel = A3, end seq.
*/
ADC12CTL0 |= ADC12ENC; // Enable conversions
ADC12CTL0 |= ADC12SC; // Start conversion
__delay_cycles(100);
}
void delayms(unsigned int n)
{
unsigned int i,j;
for(i=0;i<n;i++)
for(j=0;j<800;j++);
{
}
}
void InitRadio(void)
{
PMMCTL0_H = 0xA5;
PMMCTL0_L |= PMMHPMRE_L;
PMMCTL0_H = 0x00;
WriteRfSettings(&rfSettings);
WriteSinglePATable(PATABLE_VAL);
}
void Transmit(unsigned char *buffer, unsigned char length)
{
RF1AIES |= BIT9;
RF1AIFG &= ~BIT9; // Clear pending interrupts
RF1AIE |= BIT9; // Enable TX end-of-packet interrupt
WriteBurstReg(RF_TXFIFOWR, buffer, length);
Strobe( RF_STX ); // Strobe STX
}
void ReceiveOff(void)
{
RF1AIE &= ~BIT9; // Disable RX interrupts
RF1AIFG &= ~BIT9; // Clear pending IFG
Strobe( RF_SIDLE );
Strobe( RF_SFRX );
}
#pragma vector=CC1101_VECTOR
__interrupt void CC1101_ISR(void)
{
switch(__even_in_range(RF1AIV,32)) // Prioritizing Radio Core Interrupt
{
case 0: break; // No RF core interrupt pending
case 2: break; // RFIFG0
case 4: break; // RFIFG1
case 6: break; // RFIFG2
case 8: break; // RFIFG3
case 10: break; // RFIFG4
case 12: break; // RFIFG5
case 14: break; // RFIFG6
case 16: break; // RFIFG7
case 18: break; // RFIFG8
case 20: // RFIFG9
if(transmitting) // TX end of packet
{
RF1AIE &= ~BIT9; // Disable TX end-of-packet interrupt
}
else while(1); // trap
break;
case 22: break; // RFIFG10
case 24: break; // RFIFG11
case 26: break; // RFIFG12
case 28: break; // RFIFG13
case 30: break; // RFIFG14
case 32: break; // RFIFG15
}
}
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
RX:
#include "../inc/RF_Toggle_LED_Demo.h"
#include <stdio.h>
#define PACKET_LEN (0x14) // PACKET_LEN <= 61
#define RSSI_IDX (PACKET_LEN+1) // Index of appended RSSI
#define CRC_LQI_IDX (PACKET_LEN+2) // Index of appended LQI, checksum
#define CRC_OK (BIT7) // CRC_OK bit
#define PATABLE_VAL (0xc0)
extern RF_SETTINGS rfSettings;
unsigned char RxBuffer[24];
unsigned char RxBufferLength;
unsigned int i = 0, RX=0,n=0,j=0;
unsigned char receiving = 1;
void main( void )
{
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
SetVCore(2);
ResetRadioCore();
InitRadio();
IntUART();
__delay_cycles(400);
ReceiveOff();
receiving = 1;
_EINT();
while (1)
{
//WDTCTL = WDT_ARST_250;
//__bis_SR_register( LPM3_bits + GIE );
__no_operation();
ReceiveOn();//reset interrupt
receiving = 1;
__delay_cycles(100);
}
}
void delayms(unsigned int n)
{
unsigned int i,j;
for(i=0;i<n;i++)
{
for(j=0;j<800;j++);
}
}
void InitRadio(void)
{
// Set the High-Power Mode Request Enable bit so LPM3 can be entered
// with active radio enabled
PMMCTL0_H = 0xA5;
PMMCTL0_L |= PMMHPMRE_L;
PMMCTL0_H = 0x00;
WriteRfSettings(&rfSettings);
WriteSinglePATable(PATABLE_VAL);
}
void ReceiveOn(void)
{
RF1AIES |= BIT9; // Falling edge of RFIFG9
RF1AIFG &= ~BIT9; // Clear a pending interrupt
RF1AIE |= BIT9; // Enable the interrupt
Strobe( RF_SRX );
}
void ReceiveOff(void)
{
RF1AIE &= ~BIT9; // Disable RX interrupts
RF1AIFG &= ~BIT9; // Clear pending IFG
Strobe( RF_SIDLE );
Strobe( RF_SFRX );
}
void IntUART(void)
{
PMAPPWD = 0x02D52; // Get write-access to port mapping regs
P1MAP5 = PM_UCA0RXD; // Map UCA0RXD output to P1.5
P1MAP6 = PM_UCA0TXD; // Map UCA0TXD output to P1.6
PMAPPWD = 0; // Lock port mapping registers
P1DIR |= BIT6; // Set P1.6 as TX output
P1SEL |= BIT5 + BIT6; // Select P1.5 & P1.6 to UART function
UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
UCA0CTL1 |= UCSSEL_1; // CLK = ACLK
UCA0BR0 = 0x03; // 32kHz/9600=3.41 (see User's Guide)
UCA0BR1 = 0x00; //
UCA0MCTL = UCBRS_3+UCBRF_0; // Modulation UCBRSx=3, UCBRFx=0
UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
//UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
}
#pragma vector=CC1101_VECTOR
__interrupt void CC1101_ISR(void)
{
switch(__even_in_range(RF1AIV,32)) // Prioritizing Radio Core Interrupt
{
case 0: break; // No RF core interrupt pending
case 2: break; // RFIFG0
case 4: break; // RFIFG1
case 6: break; // RFIFG2
case 8: break; // RFIFG3
case 10: break; // RFIFG4
case 12: break; // RFIFG5
case 14: break; // RFIFG6
case 16: break; // RFIFG7
case 18: break; // RFIFG8
case 20: // RFIFG9
if(receiving) // RX end of packet
{
// Read the length byte from the FIFO
RxBufferLength = ReadSingleReg( RXBYTES );
ReadBurstReg(RF_RXFIFORD, RxBuffer, RxBufferLength);
if(CRC_OK)
{
for(j=2;j<PACKET_LEN;j++)
{
while (!(UCA0IFG&UCTXIFG));
UCA0TXBUF=RxBuffer[j];
}
}
//////////////////////
_NOP();
RX++;
// Stop here to see contents of RxBuffer
__no_operation();
}
else while(1); // trap
break;
case 22: break; // RFIFG10
case 24: break; // RFIFG11
case 26: break; // RFIFG12
case 28: break; // RFIFG13
case 30: break; // RFIFG14
case 32: break; // RFIFG15
}
//__bic_SR_register_on_exit(LPM3_bits);
}
This is just what I posted on the forum, regarding my problem. Although not relevant to you, as you do not use this chip, it may prove to be good basis for what to search for regarding your problem, or how to go about posting your own question? Hope it proves helpful to some degree
