This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

cc1200 packet transmission without device overhead

Other Parts Discussed in Thread: CC1200

Hi, TI!

I've an issue with cc1200 that works like transmitter. I want to trasmitt packets without hard overhead(sync, preamble, CRC). Whole my packet I create by MCU. I switched off CRC and preamble. But I can't switch off a syncword! If I write CC120X_SYNC_CFG1 register with 0x0A value, GPIOx interrupts doesn't works. If I use default value of this register, then interrupts works, but receiver percepts all my bytes like a payload. 

For example, my packet is: 0x55, 0x55, 0x55, 0x55, 0xD0, 0xC9, 0x07, (and then 7 bytes of payload), and 2 bytes of CRC.

And that bytes I see at the receiver side.

I want to use my software overhead, without radio invasion. How to turn off syncword and simultaneously use radio interrupts?

my config:

// Packet bit length = 0 
// RX filter BW = 10.964912 
// Carrier frequency = 433.999939 
// Manchester enable = false 
// Packet length = 255 
// Symbol rate = 1.2 
// Whitening = false 
// Device address = 0 
// Modulation format = 2-FSK 
// Address config = No address check 
// Deviation = 3.986359 
// Packet length mode = Variable 
// Bit rate = 1.2 

static const registerSetting_t preferredSettings[]= 
{
  {CC120X_IOCFG2,            0x06},
  {CC120X_SYNC_CFG1,         0x0A},      //syncword off
  {CC120X_DEVIATION_M,       0xD1},
  {CC120X_MODCFG_DEV_E,      0x00},
  {CC120X_DCFILT_CFG,        0x5D},
  {CC120X_PREAMBLE_CFG1,     0x00},      //preamble off
  {CC120X_PREAMBLE_CFG0,     0x8A},   
  {CC120X_IQIC,              0xCB},
  {CC120X_CHAN_BW,           0xA6},
  {CC120X_MDMCFG1,           0x40},
  {CC120X_MDMCFG0,           0x05},
  {CC120X_SYMBOL_RATE2,      0x3F},
  {CC120X_SYMBOL_RATE1,      0x75},
  {CC120X_SYMBOL_RATE0,      0x10},
  {CC120X_AGC_REF,           0x20},
  {CC120X_AGC_CS_THR,        0xEC},
  {CC120X_AGC_CFG1,          0x51},
  {CC120X_AGC_CFG0,          0x87},
  {CC120X_FIFO_CFG,          0x00},
  {CC120X_FS_CFG,            0x14},
  {CC120X_PKT_CFG2,          0x00},
  {CC120X_PKT_CFG1,          0x00},        //CRC off
  {CC120X_PKT_CFG0,          0x20},
  {CC120X_PKT_LEN,           0xFF},
  {CC120X_IF_MIX_CFG,        0x1C},
  {CC120X_FREQOFF_CFG,       0x22},
  {CC120X_MDMCFG2,           0x0C},
  {CC120X_FREQ2,             0x56},
  {CC120X_FREQ1,             0xCC},
  {CC120X_FREQ0,             0xCC},
  {CC120X_IF_ADC1,           0xEE},
  {CC120X_IF_ADC0,           0x10},
  {CC120X_FS_DIG1,           0x07},
  {CC120X_FS_DIG0,           0xAF},
  {CC120X_FS_CAL1,           0x40},
  {CC120X_FS_CAL0,           0x0E},
  {CC120X_FS_DIVTWO,         0x03},
  {CC120X_FS_DSM0,           0x33},
  {CC120X_FS_DVC0,           0x17},
  {CC120X_FS_PFD,            0x00},
  {CC120X_FS_PRE,            0x6E},
  {CC120X_FS_REG_DIV_CML,    0x1C},
  {CC120X_FS_SPARE,          0xAC},
  {CC120X_FS_VCO0,           0xB5},
  {CC120X_XOSC5,             0x0E},
  {CC120X_XOSC1,             0x03},
  {CC120X_PARTNUMBER,        0x20},
  {CC120X_PARTVERSION,       0x11},
  {CC120X_MODEM_STATUS1,     0x10},
};

  • Why do you want to create the packet without the aid of the radio? In your case it would be easier to let the radio send 0xD0, 0xC9, 0x07 as a sync word.

    What do you mean by interrupts don't work? I haven't looked at this but do you mean that PKT_SYNC_RXTX does not assert/ deassert when you turn off sync? What about using PA_PD if you want to do everything in the MCU?

  • Hi

    In addition to PA_PD (low in TX) you can use MARC_2PIN_STATUS[0] (high in TX). You also need to use fixed packet length mode, even if you have a length byte in your FIFO, since the radio is only capable of interpreting the length byte when it is the first byte written to the FIFO. That means that for you to send the following 16 bytes:

    0x55, 0x55, 0x55, 0x55, 0xD0, 0xC9, 0x07, (and then 7 bytes of payload), and 2 bytes of CRC,

    you need to set PKT_LEN = 16 , and PKT_CFG0. LENGTH_CONFIG = 01

    BR

    Siri

  • Hi, TER! 

    I don't need radio aid, because firstly I use SmartPreamble, and I don't want to change register config.  I have critical section time after SmartPreamble transmission. I need to send next packet immediately.

    Of course, if I use PKT_SYNC_RXTX, I can't obtain interrupts, because syncword doesn't exists. I tryed PA_PD, but it works questionably quickly. And receiver connected to PC via CCDebugger doesn't percept anything. And FIFO_THR also doesn't works. I mean, in that case SmartRF percepts packet, but transmitter side stucks in interrupt waiting.

    I solved my problem partially. When I set SYNC_CFG1 to 0x00, I can use FIFO_THR interrupt, it works properly, but I can't understand sense of this setting. That's important in my work, because I'm writing technical protocol and I need accurate conclusions. Do you have any idea? Please, help.

  • If you use SmartPreamble, why don't you follow the code example and use the same interrupts? (www.ti.com/.../swra438.pdf)
  • Because TI example doesn't turn off syncword. You can make sure that's true. That code snippet from smartpreamble_tx TI code example:

    /***************************************************************************
            The following array contain all changes needed to the settings exported
            from SmartRF Studio to run the SmartPreamble transmitter
    
            The changes are the following:
                - TX specific registers
                - FIFO_THR = 120
                - GPIO0 = TXFIFO_THR
                - GPIO2 = PA_PD (Inv)
                - No CRC
                - No preamble
                - No sync
    
            Note on Keep Bits:
                If the Keep Bits are set to all zero then the Data will be written
                to the specific Register, overwriting any existing register value.
                If the Keep Bits are non-zero then that Register will be first be
                read and a logical AND operation will be performed with the Keep
                Bits. The result of this operation will then be logically OR:ed with
                the Data. This means that all bits in the Keep Bits field will be
                preserved, making it possible to keep specific SmartRF exported
                Register fields and flags intact.
    
        =======================================================================
        |   Register               | Data                          | Keep Bits |
        =======================================================================*/
    customRegisterSetting_t customRegisterSettings[] = {
            {CC120X_SYNC_CFG0       ,0x03                           ,0x00},                           // that setting doesn't turn off syncword!!!
            {CC120X_PREAMBLE_CFG1   ,0x00                           ,0x00},
            {CC120X_IOCFG0          ,0x02                           ,0x00},
            {CC120X_IOCFG2          ,0x59                           ,0x00},
            {CC120X_FIFO_CFG        ,0x78                           ,0x00},
            {CC120X_PKT_CFG1        ,0x05                           ,0x00},
            {CC120X_PKT_CFG0        ,INFINITE_PACKET_LENGTH_MODE    ,0x00},
        };

  • I think you may be correct, it looks like the default sync word is sent at the start of the custom packet. But I'm still not sure why setting the correct setting should be an issue since the example use PA_PD and TXFIFO_THR as interrupts, not PKT_SYNC_RXTX.
  • Because, if I have syncword at the start of a packet, receiver percepts that syncword and starts write RX FIFO with payload and all my software overhead. Of course, I can to change syncword, but that undesirable.

    I solved my problem by 0x00 setting to SYNC_CFG register. This value turns off sync and sets level of soft syncword decision. I can't understand why it forces cc1200 to turn off syncword. When I set only "No sync", without invasion to sync decision level, interrupts doesn't works (FIFO_THR and PA_PD). That solution was accidentally. Maybe that's TI fault, maybe my, but  I think, all my work with register config is right. Thank you, Siri and TER!

  • Because, if I have syncword at the start of a packet, receiver percepts that syncword and starts write RX FIFO with payload and all my software overhead. Of course, I can to change syncword, but that undesirable.