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Correct Power-Up and Down

Other Parts Discussed in Thread: CC2564

I use the shutdown signal to keep in a power-down state also a LDO that powers the VDD_IO: when the Shutdown signal is asserted it goes LOW both to the CC256x that to the LDO with the output voltage VDD_IO that goes down more slowly than nSHUT. All seems to be fine following the Figure 3-2. When instead the device is powered or after a reset, the VDD_IO from the LDO goes up just after (few microseconds) the nSHUT pin. What kind of issues (if any) could this electrical situation produce?


Thanks