Hello, all
Now we have some inquiries regarding BUSY state on TMS37F128 from our customer.
Please refer to the items below, and feedback us with your comment.
When referring to the block diagram on this datasheet, BUSY pin could connect into P3.7 pin and P2.5 pin could connect into WDEEN pin.
We assume that WDEEN pin is aimed to reset LF Controller on internal Analog Frontend core.
However, we could not find out the detailed information regarding BUSY state.
Please let us clarify regarding each terms as below;
1) We assume that the situation that BUSY is asserted is as below.
- Processing reset on internal LF Controller
- Communicating via internal SPI interface
- Executing SPI command on internal SPI interface block
- Receiving LF on internal LF Controller
Please let us clarify whether our understanding is correct.
2) Please let us clarify whether we could issue reset command via WDEEN pin while BUSY is asserted.
We would appreciate if you could inform us based on the cases described above individually, as well as the reason if reset command should not be issued.
We thank you in advance for your information.
Best regards,
Seishin
