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Running Multiple Applications in SRAM

Other Parts Discussed in Thread: CC3200, CC3200SDK

Hi,

I am working on CC3200, and my aim is to load two different applications in SRAM and make a jump from one to another application.

By default CC3200 will load mcuimg.bin from SFLASH to SRAM location, in mcuimg.bin i have added code to read another application(app.bin) from SFLASH and store it to some other location in SRAM (i.e. 0x20020000). and then i am jumping to that location where it stored the app.bin. 

Both application contains its own code and data sections. I am able to Jump but not able to execute the instructions of app.bin.

app.bin has the starting address of 0x20020000, we tried to jump to its starting address, __c_init00, and main() function, but then also in every case its not executing single instruction. its just update the Program counter(PC) value with the starting address of app.bin and initialize the stack pointer according to the app.bin stack area.

We are getting the following error after execution of jump instruction.

"No Source available for UtilsDelay() at C:/ti/CC3200SDK/cc3200-sdk/examples/file_operations/ccs/release/file_operations.out :-{3}  0x20023e24{4}"

after this error if we trying to execute next instruction, then we are getting SVcall exception and its hitting FaultISR().

Because of the above errors , i am not able to execute app.bin in SRAM space, so i want to know how we can jump and execute the another application in SRAM.

Regards,

-Hardik

  • Hi Hardik,

    Did you tried modifying the default linker script (.cmd) for both the application. The first application should not use any location above 0x2002_0000 (where you load you your app.bin) and app.bin should be compiled to execute from space above 0x2002_0000. (You can use the map file to see the linked location)

    Does the app.bin works fine when you download it using debugger?

    Since you have two different binaries( or .out files), I am not sure if you will be able to debug you system using debugger. Every time you jump from first application the second (app.bin), the debugger might loose track of execution.

    Thanks and Regards,

    Praveen

  • Hi Praveen,

    Thanks for your reply,

    Yes both application contains different memory area. here i am mentioning the mapping location of both files.

    #define RAM_BASE 0x20004000(mcuimg.bin)

    /* System memory map */

    MEMORY
    {
        SRAM_CODE (RWX) : origin = 0x20004000, length = 0xF000
        SRAM_DATA (RWX) : origin = 0x20013000, length = 0xA000
    }
    #define RAM_BASE 0x20020000(app.bin)

    /* System memory map */

    MEMORY
    {
        SRAM_CODE (RWX) : origin = 0x20020000, length = 0xA000
        SRAM_DATA (RWX) : origin = 0x2002A000, length = 0xA000
    }

    our current progress is, we can able to jump from mcuimg.bin to app.bin entrypoint . The PC and SP also updating with the new locations. but the problem we are facing is with stack. while debugging, when we trying to push something then sp is decreasing in a way it should do. but when we executes pop instruction to retrieve that data its generating faultISR. and goes back to  previous application's memory area(stack).

    hope you can visualize what is happening. i am not able to find the issue. please help us to track what we are missing. as per my understanding CORTEX M4 only supports Thumb instruction set , is it right? can we change it to arm (32 bit)?

    Regards,

    -Hardik 

  • Hardik,

    CORTEX M4 supports THUMB 2 instruction set, I doesn't support arm 32-bit instructions.

    Can you post the code snippet from where you are jumping to app.bin and where you see the core going into hard fault. Also the register values as soon as you enter into the fault handler.

    Pls note that CM4 expects some alignments like stack to be 4-byte aligned. That might also be the reason for the fault.

    Thanks and Regards,

    Praveen

  • Pay also special attention to enabled interrupts and interrupt vector table.

    E.g. if there is a peripheral enabled, which uses an interrupt, you jump to second app and interrupt occurs. Perhaps interrupt vector table is not changed, so you jump into old ISR or it is already changed and you jump to ISR, which is not yet ready to do what it shall do.

    I assume you must disable all interrupt before you call second app.

    I don't know how Wifi subsystem is connected to Cortex-M4, but perhaps there is also special action needed to switch it down and re-establish connection in second app?

  • Hi Praveen/Martin,

    Thanks for your Reply,

    Following is the code that jump to the second application

    ------------------------------------------------------------------------------

     addr = (unsigned int *)(0x20023e25); /* _c_int00 address */
        f = (void (*)(void))(addr);
       f();

    Following is the register dump is from the second application before hitting the Fault ISR

    -------------------------------------------------------------------------------

    Core Registers    Core Registers    
        PC    0x20023C66    Program Counter [Core]    
        SP    0x20033FDC    General Purpose Register 13 - Stack Pointer [Core]    
        LR    0x20023931    General Purpose Register 14 - Link Register [Core]    
        xPSR    0x41000000    Stores the status of interrupt enables and critical processor status signals [Core]    
        R0    0x20024424    General Purpose Register 0 [Core]    
        R1    0x2002A824    General Purpose Register 1 [Core]    
        R2    0x00000001    General Purpose Register 2 [Core]    
        R3    0x00000000    General Purpose Register 3 [Core]    
        R4    0x00000003    General Purpose Register 4 [Core]    
        R5    0x00000000    General Purpose Register 5 [Core]    
        R6    0x20024428    General Purpose Register 6 [Core]    
        R7    0x20024450    General Purpose Register 7 [Core]    
        R8    0x00000000    General Purpose Register 8 [Core]    
        R9    0x00000000    General Purpose Register 9 [Core]    
        R10    0x00000000    General Purpose Register 10 [Core]    
        R11    0x00000000    General Purpose Register 11 [Core]    
        R12    0x0000100B    General Purpose Register 12 [Core]    
        R13    0x20033FDC    General Purpose Register 13 [Core]    
        R14    0x20023931    General Purpose Register 14 [Core]    
        MSP    0x20033FDC    MSP Register [Core]    
        PSP    0x00000000    PSP Register [Core]    
        DSP    0x00000000    DSP Register [Core]    

        CTRL_FAULT_BASE_PRI    0x00000001    CM4 Special Registers [Core]    
            CONTROL    00000000    Control    
            FAULTMASK    00000000    Faultmask    
            BASEPRI    00000000    Basepri    
            PRIMASK    00000001    Primask    

              $C$L2, FaultISR():
             2000c8ba:   E7FE     B               FaultISR
             241           while(1)

    Register dump after hitting the  FaultISR :

    -------------------------------------------------------------------------------

    Core Registers    Core Registers    
        PC    0x2000C8BA    Program Counter [Core]    <---  Previous Application memory area.
        SP    0x20033FB8    General Purpose Register 13 - Stack Pointer [Core]    
        LR    0xFFFFFFF9    General Purpose Register 14 - Link Register [Core]    
        xPSR    0x41000003    Stores the status of interrupt enables and critical processor status signals [Core]    
        R0    0x20024424    General Purpose Register 0 [Core]    
        R1    0x2002A824    General Purpose Register 1 [Core]    
        R2    0x00000001    General Purpose Register 2 [Core]    
        R3    0x00000000    General Purpose Register 3 [Core]    
        R4    0x00000003    General Purpose Register 4 [Core]    
        R5    0x00000000    General Purpose Register 5 [Core]    
        R6    0x20024428    General Purpose Register 6 [Core]    
        R7    0x20024450    General Purpose Register 7 [Core]    
        R8    0x00000000    General Purpose Register 8 [Core]    
        R9    0x00000000    General Purpose Register 9 [Core]    
        R10    0x00000000    General Purpose Register 10 [Core]    
        R11    0x00000000    General Purpose Register 11 [Core]    
        R12    0x0000100B    General Purpose Register 12 [Core]    
        R13    0x20033FB8    General Purpose Register 13 [Core]    
        R14    0xFFFFFFF9    General Purpose Register 14 [Core]    
        MSP    0x20033FB8    MSP Register [Core]    
        PSP    0x00000000    PSP Register [Core]    
        DSP    0x00000000    DSP Register [Core]    

        CTRL_FAULT_BASE_PRI    0x00000001    CM4 Special Registers [Core]    
            CONTROL    00000000    Control    
            FAULTMASK    00000000    Faultmask    
            BASEPRI    00000000    Basepri    
            PRIMASK    00000001    Primask    

    Martin you are right we are falling back to previous Application ISR area(according to PC value). one more thing i want to add is i am disabling the master Interrupts  by IntMasterDisable();, before jumping to second application. because of that PRIMASK value is set to 1.

    when i checked PRIMASK status by running stand alone  second application to same memory location, it was set to 0. hope this is not generating the Fault. other then this PRIMASK and R12 resister value, other values were same. while running stand alone application both PRIMASK and R12 was 0.


    Regards,

    -hardik 

  • Hi Hardik,

    It seems like your application is trying to access memory above 192 KB (SP = 0x20033FDC). Available SRAM is only 192 KB

    Thanks and Regards,

    Praveen

  • Hi Hardik,

    Sorry for my post. I am not answering your query but I also have similar requirement to jump from mcuimg.bin  to my app.bin and stuck at first level to load my app.bin in to flash (thread opened ).

    Since you managed to load your app.bin in to SRAM, may be you can help me with your steps. I need to know how did you load your app.bin in to flash and how did you load app.bin from flash to Memory address of app.bin specified in linked script of app.bin

    Your help and any code example is appreciated.

  • Hello Hardik,

    Questions:  

    1. What is the advantage of this type of setup?  
    2. Is an RTOS also being used or are you attempting to implement your own RTOS?  
    3. Would an RTOS not eliminate these issues including exceeding/overwriting RAM for each application?

    Thanks,

  • Hi Praveen,

    but if i am running stand alone application with the same RAM base location (20020000) , then its working.

    If this is the case then can you please tell me upto which location we can use SRAM for application purpose?

    do this 192KB includes 16KB of Bootloader? or it is separate? 

    Regards,

    -Hardik

  • Hi Hardik,

    In this pre-production device version 1.32 there is 192 KB of RAM for application. Out of this first 16KB is shared with boot loader so it can only be used for data needs and not for code.

    Thanks and Regards,

    Siddaram

  • Hi Siddaram/Praveen,

    Thanks for your support now I am able to jump from one application to another application and its successfully running in SRAM.

    Thank you,

    Regards,

    -hardik

  • Hi greenja/vipin.

    The aim is to update the mcuimg.bin from the second application. so this second application will help us to upgrade the mcuimg.bin and help us to again boot from the updated application. 

    Vipin we are just copying the code into SRAM and jumping to the entrypoint. Please verify once that the code being copied Properly to that location or not? 

    Thanks,

    Regards

    -Hardik