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Differences when programming the CC3200 module (cc3200mod)

Other Parts Discussed in Thread: CC3200, CC3200MOD, UNIFLASH, CC3100

Hello,

I wanted to ask if there are any differences when programming the CC32000 module compared to the LaunchPad. More specifically if anything needs to be loaded into the serial flash, or if it comes "pre-loaded".

I currently try to run some programs on the module, that I developed on the Launchpad and run into problems. My SPI examples work fine, however when I try to run WiFi test code (including the SDK examples) I get the following error when executing sl_Start:


Invalid ACK 0x6 in JTAG-DP transaction
Polling target cc3200.cpu failed, GDB will be halted. Polling again in 100ms

[Remote target] #1 stopped.

I attach my gdbinit and cc3200.cpu file.

Thank you for your time,

Severin

cc3200.txt
#
# Droidifi OpenOCD config for TI CC3200-LP V3.2
#
# http://www.droidifi.com
#
# Copyright Droidifi LLC 2013, 2014 All rights reserved
#

#*****************************************************************************
#
#  
# 
# 
#  Redistribution and use in source and binary forms, with or without 
#  modification, are permitted provided that the following conditions 
#  are met:
#
#    Redistributions of source code must retain the above copyright 
#    notice, this list of conditions and the following disclaimer.
#
#    Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the 
#    documentation and/or other materials provided with the   
#    distribution.
#
#    Neither the name of Texas Instruments Incorporated nor the names of
#    its contributors may be used to endorse or promote products derived
#    from this software without specific prior written permission.
#
#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************

interface ftdi
ftdi_device_desc "USB <-> JTAG/SWD"
ftdi_vid_pid 0x0451 0xc32a
ftdi_layout_init 0x00a8 0x00eb
ftdi_layout_signal nSRST -noe 0x0020
adapter_khz 1000
set _ENDIAN little

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME cc3200
}

source [find target/icepick.cfg]

if { [info exists DAP_TAPID] } {
	set _DAP_TAPID $DAP_TAPID
} else {
	set _DAP_TAPID 0x0b97c02f
}

jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable

# APP m4
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"

# ICEpick-C (JTAG route controller)
if { [info exists JRC_TAPID] } {
	set _JRC_TAPID $JRC_TAPID
} else {
	set _JRC_TAPID $_DAP_TAPID
}

jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version

# jtag configure auto0.jrc -event post-reset "runtest 100"
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"

set _TARGETNAME $_CHIPNAME.cpu

target create $_CHIPNAME.cpu cortex_m -endian little -chain-position $_CHIPNAME.dap 
$_CHIPNAME.cpu configure -work-area-phys 0x20000000 -work-area-size 0x30000 -work-area-backup 0 -coreid 0

source [find mem_helper.tcl]

$_TARGETNAME configure -event gdb-attach {
# 	cc3200_dbginit $_TARGETNAME
#	cortex_m dbginit
	halt
}

$_TARGETNAME configure -event "reset-start" { adapter_khz 1000 }
$_TARGETNAME configure -event "reset-assert" {

   global _CHIPNAME

   # assert warm system reset through ICEPick
   icepick_c_wreset $_CHIPNAME.jrc
}

 
# Run this to enable invasive debugging.  This is run automatically in the
# reset sequence.
proc cc3200_dbginit {target} {

   cortex_m dbginit
 
}

gdbinit.txt
#*****************************************************************************
# gdbinit
#
# Initilization script for GDB for ARM
#
# Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 
# 
# 
#  Redistribution and use in source and binary forms, with or without 
#  modification, are permitted provided that the following conditions 
#  are met:
#
#    Redistributions of source code must retain the above copyright 
#    notice, this list of conditions and the following disclaimer.
#
#    Redistributions in binary form must reproduce the above copyright
#    notice, this list of conditions and the following disclaimer in the 
#    documentation and/or other materials provided with the   
#    distribution.
#
#    Neither the name of Texas Instruments Incorporated nor the names of
#    its contributors may be used to endorse or promote products derived
#    from this software without specific prior written permission.
#
#  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
#  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
#  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
#  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
#  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
#  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
#  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
#  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
#  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
#  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************

#*****************************************************************************
#Connect To the tartget using OpenOCD
#*****************************************************************************
target remote | /home/severin/uni/ocd/bin/openocd  -c "gdb_port pipe; log_output config/openocd.log" -f config/cc3200.cfg


#*****************************************************************************
# Load the binary
#*****************************************************************************
load

#*****************************************************************************
# Initialize the SP and PC values from the application's 
# vector table
#*****************************************************************************
set $sp = g_pfnVectors[0]
set $pc = g_pfnVectors[1]

#*****************************************************************************
# Set break point at main and run to main
#*****************************************************************************
break main
continue

  • Hi Severine,

    The module comes preloaded with the latest Service Pack (for the time when the module was programmed) and the Out Of Box example.

    Should be straight forward and compatible with the LaunchPad (that is probably occupied with The QFN flavor of CC3200).

    Can you elaborate the setup? How did you connect the module?

    Shlomi 

  • Hi,

    I would like to follow up on this one since I did the PCB.
    The board is in fact rather minimal. We included everything required for the 3V3 power supply (i.e., LDO + filtering caps) and the Taiyo Yuden chip antenna + matching circuit. And we have broken out the SPI pins because we plan to interface our CC3200 with an other internally designed MCU-board later on.
    We really followed the minimal design suggested in www.ti.com/.../applications_implementation_and_layout

    I'm not really sure what is going wrong. From what I know from the software side the fault Severion mentions occurres as soon as he tries to initialize the Wifi part of the CC3200MOD. To me it looks like the MCU is reset (or hard-faults) for some reason.
    Do you think it would make sense to implement the hard fault handler to see if we end up there?

    Thanks,
    Thomas
  • Hi,

    It would be interesting to realize why it ends up in fault ISR as I cannot think of a reason.

    Shlomi

  • Hello Shlomi,

    is there any test code that I could run? If it is of any help, here is the full gdb session:

    # arm-none-eabi-gdb -x gdbinit exe/tcp_socket.axf
    GNU gdb (GNU Tools for ARM Embedded Processors) 7.8.1.20141128-cvs
    Copyright (C) 2014 Free Software Foundation, Inc.
    License GPLv3+: GNU GPL version 3 or later <gnu.org/.../gpl.html&gt;
    This is free software: you are free to change and redistribute it.
    There is NO WARRANTY, to the extent permitted by law. Type "show copying"
    and "show warranty" for details.
    This GDB was configured as "--host=i686-linux-gnu --target=arm-none-eabi".
    Type "show configuration" for configuration details.
    For bug reporting instructions, please see:
    <www.gnu.org/.../&gt;.
    Find the GDB manual and other documentation resources online at:
    <www.gnu.org/.../&gt;.
    For help, type "help".
    Type "apropos word" to search for commands related to "word"...
    Reading symbols from exe/tcp_socket.axf...done.
    Open On-Chip Debugger 0.8.0 (2015-01-15-11:02)
    Licensed under GNU GPL v2
    For bug reports, read
    openocd.sourceforge.net/.../bugs.html
    IntDefaultHandler () at ../../common/startup_gcc.c:316
    316 }
    Loading section .text, size 0xcde8 lma 0x20004000
    Loading section .ARM, size 0x8 lma 0x20010de8
    Loading section .data, size 0x888 lma 0x20010df0
    Start address 0x200058c4, load size 54904
    Transfer rate: 66 KB/sec, 3660 bytes/write.
    Breakpoint 1 at 0x2000554a: file ../main.c, line 1121.

    Breakpoint 1, main () at ../main.c:1121
    1121 long lRetVal = -1;
    (gdb) c
    Continuing.
    Invalid ACK 0x6 in JTAG-DP transaction
    Polling target cc3200.cpu failed, GDB will be halted. Polling again in 100ms

    [Remote target] #1 stopped.
    0x2000554e in main () at ../main.c:1121
    1121 long lRetVal = -1;
    (gdb)


    The problems seems to only occour when calling sl_start()

    Cheers,
    Severin
  • Severin,

    I'm working on Windows with CCS IDE.

    Any of the examples in the SDK would work (most of them have sl_start). You can pick any.

    You are using gdbon Linux, right? it seems as it fails on the first line lRetVal = -1;. Where do you see it fails on sl_start()?

    Can you describe your setup with the module (hardware wise)?

    Shlomi

  • Hello Shlomi,

    yes I use gdb and openocd on Linux. Although gdb says it fails on lRetVal = -1;, the code definitely executes further than that. When I instrument the code with printf (Report) calls, I will see it fail on line 435 of main.c (in the tcp_socket example). This is lMode = sl_Start(0, 0, 0);. A Report("test\n\r") before the sl_Start call will be output on the console, while a Report right after it will never be printed. If i step through the code with gdb it will fail when calling NwpPowerOn (see gdb session at the end of this post).

    We now also experimented with another CC3200 module and see a slightly different behavior: It will execute until the sl_Start, but then fail at the ASSERT right after it. It will fail with "Error [-1] at line [437] in function [ConfigureSimpleLinkToDefaultState]", which suggests _sl_GetStartResponseConvert (called in sl_Start) returns ROLE_STA_ERR.
    I am not sure if these two problems could have the same root cause and I am not sure why two identical chips react differently. A CC3200 Launchpad will execute the same code in the same environment (same host computer and access point) correctly.

    Do you have any ideas on how to narrow the problem down?

    Cheers,
    Severin


    Here is the gdb session:
    Breakpoint 1, main () at ../main.c:1123
    1123 long lRetVal = -1;
    (gdb) break sl_Start
    Breakpoint 2 at 0x20005a20: file ../source/device.c, line 97.
    (gdb) c
    Continuing.

    Breakpoint 2, sl_Start (pIfHdl=0x0, pDevName=0x0, pInitCallBack=0x0)
    at ../source/device.c:97
    97 _i16 ObjIdx = MAX_CONCURRENT_ACTIONS;
    (gdb) next
    101 sl_DeviceEnablePreamble();
    (gdb) next
    104 _SlDrvDriverCBInit();
    (gdb)
    107 if (NULL == pIfHdl)
    (gdb)
    109 g_pCB->FD = sl_IfOpen((void *)pDevName, 0);
    (gdb)
    116 ObjIdx = _SlDrvWaitForPoolObj(START_STOP_ID,SL_MAX_SOCKETS);
    (gdb)
    117 if (MAX_CONCURRENT_ACTIONS == ObjIdx)
    (gdb)
    121 OSI_RET_OK_CHECK(sl_LockObjLock(&g_pCB->ProtectionLockObj, SL_OS_WAIT_FOREVER));
    (gdb)
    122 g_pCB->ObjPool[ObjIdx].pRespArgs = (_u8 *)&AsyncRsp;
    (gdb)
    123 OSI_RET_OK_CHECK(sl_LockObjUnlock(&g_pCB->ProtectionLockObj));
    (gdb)
    125 if( g_pCB->FD >= 0)
    (gdb)
    127 sl_DeviceDisable();
    (gdb)
    129 sl_IfRegIntHdlr((SL_P_EVENT_HANDLER)_SlDrvRxIrqHandler, NULL);
    (gdb)
    131 if(NULL != pInitCallBack)
    (gdb)
    135 sl_DeviceEnable();
    (gdb) s
    NwpPowerOn () at ../cc_pal.c:799
    799 HWREG(0x4402E16C) &= 0xFFFFFFFD;
    (gdb) s
    803 HWREG(0x44025118) = 1;
    (gdb) s
    805 UtilsDelay(8000000);
    (gdb) s
    Warning:
    Cannot insert breakpoint 1.
    Cannot access memory at address 0x20005566
    Cannot insert breakpoint 2.
    Cannot access memory at address 0x20005a20

  • Hi Severine,

    The only thing I can think of is if you have a pull down on the RX UART line used for flashing (I believe it is pin #47. Can you please check it?

    Also, since it is custom board, how did you connect the UART lines (pin #46 and #47)? Are you able to work with Uniflash and program the module?

    Shlomi

  • Hi Shlomi,

    Interesting point. In fact, ping 47 (UART RX) is broken out on our board and it is connected to an (external) FTDI UART to USB converter.

    What is unclear to us is what you mean by flashing. From the reference schematic (section 6.1 in the CC3200MOD datasheet) I can see that pins 35 (nReset), 46 (GPIO 1), 47 (GPIO 2) and 23 (SOP2) are connected to a "FLASH PROGRAM" header.

    We are not making used of this "FLASH PROGRAM" interface but use the JTAG interface (TCK, TMS, TDI and TDO) for programming.
    As I wrote previously pins 46 and 47 are connected to an FTDI chip. Is this something we should not do? What is expected to be flashed via this flash interface and how is this related to our radio startup problem?

    Thanks,

    Thomas & Severin

  • Hi,

    It is mostly for CC3100, not CC3200. Sensing low level on RX would make CC3100 device go into boot loader mode during initialization. Since you use CC3200 it is not the case. In any case, it is just another way to test if you are able to flash your custom board via the UART lines using Uniflash (you would need to do it at some point with the new service packs that come out).

    Additionally, reading the entire post I can see: "And we have broken out the SPI pins because we plan to interface our CC3200 with an other internally designed MCU-board later on." Can you explain what exactly you did with the SPI lines? which pins did you route and to where?

    I'm asking because not passing sl_start() implies either:

    1. not powering the device + not toggling nHib/nReset
    2. Host IRQ line is not connected
    3. SPI lines are broken

    Another test is to set a breakpoint at the IRQ handler and see if you get there. After the device is initialized, it assert the IRQ to the host. you should trap it.

    Shlomi

  • Hello Shlomi,

    this is not a direct reply to your post, but another observation that might help to pin-point the problem. When running the FreeRTOS example, execution will fail with the following error:
    (gdb) c
    Continuing.
    Error: cc3200.cpu -- clearing lockup after double fault
    cc3200.cpu -- clearing lockup after double fault
    Polling target cc3200.cpu failed, GDB will be halted. Polling again in 100ms

    Program received signal SIGINT, Interrupt.
    0x200060b4 in prvPortStartFirstTask ()
    at ../../third_party/FreeRTOS/source/portable/GCC/ARM_CM4/port.c:259
    259 __asm volatile(
    (gdb)

    (This example of course works with the LaunchPads.)

    Does this make any sense to you?

    Thank you,
    Severin
  • Hi,

    It does not shed more light.

    Can you please follow my request and let me know if you get to _SlDrvRxIrqHandler().

    Also, what did you mean by breaking the SPI pins?

    Shlomi

  • Hello Shlomi,

    yes, we get to _SlDrvRxIrqHandler() (see gdb session at the end of this post). However, I noticed, that after setting the breakpoint and (c)ontinuing, it took almost 45 seconds to reach the breakpoint at _SlDrvRxIrqHandler. I then continued to step through the program, but it got stuck at SlNonOsMainLoopTask until I killed it with Ctrl+C.

    By breaking out the SPI pins, Thomas means that our designs has the SPI pins physically available to connect cables to them.

    Cheers,
    Severin


    0x20004c0c in UserInput () at ../main.c:668
    668 lRetVal = BsdTcpServer(g_uiPortNum);
    Loading section .text, size 0xce20 lma 0x20004000
    Loading section .ARM, size 0x8 lma 0x20010e20
    Loading section .data, size 0x888 lma 0x20010e28
    Start address 0x200058e0, load size 54960
    Transfer rate: 66 KB/sec, 3664 bytes/write.
    Breakpoint 1 at 0x20005566: file ../main.c, line 1123.

    Breakpoint 1, main () at ../main.c:1123
    1123 long lRetVal = -1;
    (gdb) break _SlDrvRxIrqHandler
    Breakpoint 2 at 0x200060bc: file ../source/driver.c, line 202.
    (gdb) c
    Continuing.

    Breakpoint 2, _SlDrvRxIrqHandler (pValue=0x0) at ../source/driver.c:202
    202 sl_IfMaskIntHdlr();
    (gdb) n
    204 g_pCB->RxIrqCnt++;
    (gdb)
    206 if (TRUE == g_pCB->IsCmdRespWaited)
    (gdb)
    212 sl_Spawn((_SlSpawnEntryFunc_t)_SlDrvMsgReadSpawnCtx, NULL, 0);
    (gdb)
    214 }
    (gdb)
    _SlNonOsMainLoopTask () at ../source/nonos.c:139
    139 if (NULL != pF)
    (gdb)
    134 for (i=0 ; i<NONOS_MAX_SPAWN_ENTRIES ; i++)
    (gdb)
    150 return NONOS_RET_OK;
    (gdb)
    151 }
    (gdb)
    _SlNonOsSemGet (pSyncObj=0x20013814 <g_StatMem+20> "\021", WaitValue=34 '"',
    SetValue=17 '\021', Timeout=255 '\377') at ../source/nonos.c:74
    74 while (Timeout>0)
    (gdb)
    76 if (WaitValue == *pSyncObj)
    (gdb)
    81 if (Timeout != NONOS_WAIT_FOREVER)
    (gdb)
    85 _SlNonOsMainLoopTask();
    (gdb)
    ^C
    Program received signal SIGINT, Interrupt.
    0x20007a84 in _SlDrvRxHdrRead (pBuf=0x20012688 <pui32Stack+3700> "",
    pAlignSize=0x20012683 <pui32Stack+3695> "\245\245\245\245\245")
    at ../source/driver.c:1232
    1232 VERIFY_PROTOCOL(SyncCnt < SL_SYNC_SCAN_THRESHOLD);
  • Hello Shlomi,

    from time to time, I actually get a different gdb session (attached again at the end of the post). The long delay is still present.

    Cheers,
    Severin


    1123 long lRetVal = -1;
    (gdb) break _SlDrvRxIrqHandler
    Breakpoint 2 at 0x200060bc: file ../source/driver.c, line 202.
    (gdb) c
    Continuing.

    Breakpoint 2, _SlDrvRxIrqHandler (pValue=0x0) at ../source/driver.c:202
    202 sl_IfMaskIntHdlr();
    (gdb) n
    204 g_pCB->RxIrqCnt++;
    (gdb)
    206 if (TRUE == g_pCB->IsCmdRespWaited)
    (gdb)
    212 sl_Spawn((_SlSpawnEntryFunc_t)_SlDrvMsgReadSpawnCtx, NULL, 0);
    (gdb)
    214 }
    (gdb)
    _SlNonOsMainLoopTask () at ../source/nonos.c:131
    131 {
    (gdb)
    134 for (i=0 ; i<NONOS_MAX_SPAWN_ENTRIES ; i++)
    (gdb)
    136 _SlNonOsSpawnEntry_t* pE = &g__SlNonOsCB.SpawnEntries[i];
    (gdb)
    137 _SlSpawnEntryFunc_t pF = pE->pEntry;
    (gdb)
    139 if (NULL != pF)
    (gdb)
    141 if((g_pCB)->RxIrqCnt != (g_pCB)->RxDoneCnt)
    (gdb)
    143 pF(0);/*(pValue);*/
    (gdb)
    ^C
    Program received signal SIGINT, Interrupt.
    0x20007a84 in _SlDrvRxHdrRead (pBuf=0x20012688 <pui32Stack+3700> "",
    pAlignSize=0x20012683 <pui32Stack+3695> "\245\245\245\245\245")
    at ../source/driver.c:1232
    1232 VERIFY_PROTOCOL(SyncCnt < SL_SYNC_SCAN_THRESHOLD);
  • Hello Shlomi,

    and just to add some more contradicting results, I just complete reset the board (power off/on) and now I never reach the break point. gdb sessino is again attached.

    Cheers,
    Severin


    0x20008c3c in _SlNonOsMainLoopTask () at ../source/nonos.c:137
    137 _SlSpawnEntryFunc_t pF = pE->pEntry;
    Loading section .text, size 0xce20 lma 0x20004000
    Loading section .ARM, size 0x8 lma 0x20010e20
    Loading section .data, size 0x888 lma 0x20010e28
    Start address 0x200058e0, load size 54960
    Transfer rate: 66 KB/sec, 3664 bytes/write.
    Breakpoint 1 at 0x20005566: file ../main.c, line 1123.

    Breakpoint 1, main () at ../main.c:1123
    1123 long lRetVal = -1;
    (gdb) break _SlDrvRxIrqHandler
    Breakpoint 2 at 0x200060bc: file ../source/driver.c, line 202.
    (gdb) c
    Continuing.
    ^C
    Program received signal SIGINT, Interrupt.
    0x20008c40 in _SlNonOsMainLoopTask () at ../source/nonos.c:139
    139 if (NULL != pF)
  • Hi Severine,

    Really hard to follow the DGB debugger.

    Let me try to explain the expected from in details (with potential issues) so you can try to follow in your implementation:

    1. invoking sl_start() power on the device.
    2. at device initialization process ends, the device asserts an interrupt to the host for signaling. Any issues with the IRQ line would make the host keep waiting forever. In your case, you get to the breakpoint so most chances are that this is OK (unless you have jitter on the IRQ line causing some kind of a false alarm).
    3. Until an IRQ is received, the host is blocked on _SlNonOsSemGet() invoked from within sl_start(). In _SlNonOsSemGet(), it continuously calls _SlNonOsMainLoopTask() to check if the spawn function has been registered by the interrupt handler
    4. upon interrupt reception, the _SlDrvRxIrqHandler() is invoked, registering the spawn handler _SlDrvMsgReadSpawnCtx() and exists
    5. _SlNonOsMainLoopTask() is finally invoked, calling to the registered function via pF(0);/*(pValue);*/ line
    6. _SlDrvMsgReadSpawnCtx() calls _SlDrvMsgRead() and then _SlDrvRxHdrRead() which write CNYS pattern on the SPI lines and read back SYNC pattern and then continues. Failing to write CNYS or read SYNC as a result of SPI lines issues would make the system get stuck

    Hope the procedure is clear so you can follow and check the SPI, IRQ lines. This is the reason I asked on breaking the SPI lines as it may be related to the issue you are observing.

    Shlomi

    Shlomi

  • Hi Severine,

    It has been a while. Any update on the issue? have you figured out the root cause? if not, please let me know where it fails according to my latest post.

    Shlomi

  • Is it possible that he is not configuring SOP pins rit for JTAG
  • No,

    It fails during debugging, nor programming. besides, they succeed in downloading the code and debugging.

    Shlomi

  • Hi,

    I am closing the thread, if issue still exist please open a new thread and add a link to this one for reference.

    Shlomi