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CC2538 32-kHz crystal oscillator

benoit.thebaudeau.dev
Intellectual 320 points
Other Parts Discussed in Thread: CC2538

Hi,

In order to use the 32-kHz crystal oscillator on the CC2538, is there anything more to do than clearing SYS_CTRL_CLOCK_CTRL.OSC32K? I am especially wondering how the PD6 and PD7 pads should be configured. Should they be set to analog or something else, or just left with their default configuration? I do not see notes about that in the datasheet or in the user's guide, and all the software examples seem to use the RC oscillator.

Best regards,
Benoît

  • 0
    Intellectual 320 points

    My tests show that PD6 and PD7 have to be forced to analog for the 32-kHz crystal oscillator to work. Otherwise, the sleep timer just remains frozen if SYS_CTRL_CLOCK_CTRL.OSC32K is cleared, because the system control IP does not seem to automatically assert the ANA input signal of those pads.

    I have noticed that, contrary to SYS_CTRL_CLOCK_STA.OSC, SYS_CTRL_CLOCK_STA.OSC32K is cleared immediately once the crystal is enabled through the control register, even if the oscillator actually does not oscillate (e.g. if the pads are not forced to analog). Is it a silicon bug? I do not see any erratum about this behavior. This is a serious issue if there is no easy means of knowing when the 32-kHz crystal oscillator is running and stable once enabled, since the sleep timer and the watchdog depend on it and have to be reliable before being used. Is there any workaround other than polling the sleep timer counter? Or is it possible to use the SYNC_32K bit instead? When is this bit cleared by hardware?

    Best regards,
    Benoît

  • 0 in reply to benoit.thebaudeau.dev
    Intellectual 320 points

    My latest tests confirm that write accesses to the OSC32K control bit are ignored if the system clock is the 32-MHz crystal oscillator, and taken into account for the 16-MHz RC oscillator (as stated by the user's guide), and that in the latter case, the OSC32K status bit immediately reflects the control bit, even if there is no oscillation. However, my tests show that waiting for a rising edge of the SYNC_32K status bit works to confirm that the oscillator works (this bit is periodically cleared and set by hardware).

    In the end, the SYNC_32K bit is a good workaround, but I am still wondering if this behavior of the OSC32K bit is normal or a new erratum.

    Best regards,
    Benoît

  • 0 in reply to benoit.thebaudeau.dev
    Prodigy 160 points
    I'll apologise for bumping an old thread, but wanted to thank you for posting that bit. I was struggling to get the watchdog timer to work (see e2e.ti.com/.../2310817 and it was your tip about PD6/PD7 that was the missing link.
  • 0 in reply to Stuart Longland
    Intellectual 320 points
    You're welcome. It would indeed be great if TI improved their follow-up and documentation regarding such issues.