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CC2650: DMA + SSI = Non-Functional interrupt capabilities?

Part Number: CC2650

I set up the DMA to transfer 48bytes of data, that part works well.  However when I set up the interrupt, I discovered the interrupt flag in UDMA:REQDONE SSI0_TX is set, the moment SSI0:DMACR TXDMAE is set.  This results in the interrupt vector being called the moment SSI0:DMACR TXDMAE is set. 

On pg  1487 of the Manual it says:

"To enable uDMA operation for the transmit channel, set the [SSI:DMACR TXDMAE] register bit.  If the UDMA is enabled and appropriate bits are cleared in the DMA Done Mask register, the uDMA controller triggers an interrupt when a transfer completes.

Which does not occur because, when you "enable uDMA operation" via SSI0:DMACR TXDMAE the interrupt is triggered immediately, prior to the transfer.  As long as SSI0:DMACR TXDMAE is set the UDMA:REQDONE SSI0_TX flag can not be cleared.  The manual goes on to say:

"The interrupt occurs on the SSI interrupt vector.  If interrupts are used for SSI operation and the uDMA is enabled, the SSI interrupt handler must be designed to handle the uDMA completion interrupt.  The status of TX and RX DMA done interrupts can be read from the channel request done register (UDMA:REQDONE).  For clearing the TX and RX DMA done interrupts, the corresponding bits in the UDMA:REQDONE register must be 1."

However as mentioned above it is not possible to clear the TX DMA done register as long as the SSI module is set for DMA operation.  A bit of a catch 22 it seems.  

Has anyone come up with a work around for this that would allow "the uDMA controller to trigger an interrupt when the transfer completes"?

  • Update: The reference for pg 1487 was the rev G version of the reference manual. It is now on pg 1495 in the RevH technical ref manual (SWCU117H).

    Also in the SSI interrupt section it states you can mask TX DMA and RX DMA independently by setting UDMA:DONEMASK. However this seems to have the side effect of only allowing one transfer and inhibiting the remainder specified by the DMA control word? Furthermore, the register description for DONEMASK states the UDMA: DONEMASK register is "Specifically used for software channels." implying don't use for other peripherals? Has anyone had any luck masking the SPI0TX interrupt when the DMA transfer size is greater then 1?

    pg.1487 of SWCU117H. 20.4.3 Interrupts
    "RX DMA done and TX DMA done interrupts can be masked by setting the appropriate bit in the UDMA Channel Request
    Done Mask Register (UDMA:DONEMASK). Clearing the appropriate bit in the UDMA:DONEMASK register
    enables the RX or TX DMA done interrupt."

    pg 1187 of SWCU117H. Table 12-26 DONEMASK Register field descriptions:
    "Controls the propagation of the uDMA done and active state to the
    assigned peripheral. Specifically used for software channels."
  • Hello Jonathan,

    I'm sorry you are having problems with the configuration of the DMA on he SSI Pheripheral.

    Our TIDrivers provided on the SDK handle all of this for you, you can go ahead and see the source (located in:  <sdk_directory>/ti/drivers/spi). Check the 

    SPICC26XXDMA_configDMA(SPI_Handle handle, SPI_Transaction *transaction) API, and you will be able to see the correct order of configuring the registers and how to handle the interrupts.
    Best Regards,
    Andres Blanco
  • Thanks for the info. The "SPICC26XXDMA_configDMA" function does not have any information pertaining to interrupts.  But looking at the function below, SPICC26XXDMA_hwiFxn, I see an interesting note in the comments that reads "//In SPI slave mode  this interrupt may occur immediately..."  This is the functionality I see in Master mode with DMA as well, because  it is not possible to clear the TX DMA done register as long as the SSI module is set for DMA operation, which causes the interrupt to occur immediately.  However, the code you mention reverses this order, i.e the code in the function SPICC26XXDMA first disables the SSIDMA, then clears the interrupt.  However the moment that the SPI DMA is re-enabled you will reenter the ISR.   Are you having a different result?    

    Has anyone had success with the source mentioned or otherwise getting the uDMA controller to trigger an interrupt when the transfer completes on the SSI DMA channel at the SPI interrupt vector?  

    I also tried redirecting the interrupt vector to the DMA vector using the DONEMASK register however setting the bit for the SPI channel would abort the DMA transfer after the first byte was sent.

  • Hello,

    I believe that the source we provided uses the uDma for SPI transfer.

    Could you provide us with more information about what you need to get done and what you have done so far, this way we can help you with a clearer answer to your problem.

    Best Regards,
    Andres Blanco

  • Hello Andres,

    I am transmitting/receiving 48byes of data per DMA transaction on the SSI DMA channel.  I would like to get an interrupt to clear the chip select, among other things,  after all 48bytes have completed transferring to the specified memory location.  The specific issue I am having is as soon asSSI:DMACR TXDMAE is set,  the interrupt flag is set, causing it to go to the interrupt vector prior to the completion of the DMA transfer.  

    However in the manual :

    "To enable uDMA operation for the transmit channel, set the [SSI:DMACR TXDMAE] register bit.  If the UDMA is enabled and appropriate bits are cleared in the DMA Done Mask register, the uDMA controller triggers an interrupt when a transfer completes."

    I am unable to reproduce this functionality described in the manual because setting SSI:DMACR TXDMAE immediately triggers the interrupt and not when a transfer completes.  However I just noticed it says "a transfer" and not "the transfer".  Can you provide clarity on the phrase "a transfer" i.e. will it interrupt when 1 byte out of 48 is completed, or when all bytes are transferred as defined in the control word? 

    I tried another method mentioned in the manual.  Rather then using the SPI interrupt vector I tried masking the SSITX bit via (UDMA:DONEMASK) as mentioned on pg 1487, however I received some unexpected behavior when doing so.  What it would do is abort the DMA transfer after 1 byte was sent.  Incidentally on pg.1187 it states the (UDMA:DONEMASK) is "Specifically used for software channels" so its unclear if it should be used for peripherals.  Reference from manual below.  

    pg.1487 of SWCU117H. 20.4.3 Interrupts
    "RX DMA done and TX DMA done interrupts can be masked by setting the appropriate bit in the UDMA Channel Request
    Done Mask Register (UDMA:DONEMASK). Clearing the appropriate bit in the UDMA:DONEMASK register
    enables the RX or TX DMA done interrupt."

    pg 1187 of SWCU117H. Table 12-26 DONEMASK Register field descriptions:
    "Controls the propagation of the uDMA done and active state to the
    assigned peripheral. Specifically used for software channels."

  • hello Jonathan Snyder36
    I need your help about the use of udma and ssi.