Hi,
I'm trying to send and receive packages withot RTOS. (GFSK, 1 Mbit/s, Deviation 500 KHz)
For debugging i have activated following Interrupts:
RFCHwIntEnable(RFC_DBELL_RFHWIEN_MDMSOFT | RFC_DBELL_RFHWIEN_RATCH7 | RFC_DBELL_RFHWIFG_MDMIN | RFC_DBELL_RFHWIFG_MDMOUT); RFCHwIntClear(RFC_DBELL_RFHWIEN_MDMSOFT | RFC_DBELL_RFHWIEN_RATCH7 | RFC_DBELL_RFHWIFG_MDMIN | RFC_DBELL_RFHWIFG_MDMOUT); RFCCpe0IntEnable(RFC_DBELL_RFCPEIEN_TX_DONE | RFC_DBELL_RFCPEIEN_RX_ENTRY_DONE | RFC_DBELL_RFCPEIEN_RX_ABORTED); RFCCpeIntClear(RFC_DBELL_RFCPEIEN_TX_DONE | RFC_DBELL_RFCPEIEN_RX_ENTRY_DONE | RFC_DBELL_RFCPEIEN_RX_ABORTED); IntPendClear(INT_RFC_CPE_0); IntRegister(INT_RFC_CPE_0, bspRFDataQueueAndAbortIsr); IntEnable(INT_RFC_CPE_0); IntPendClear(INT_RFC_HW_COMB); IntRegister(INT_RFC_HW_COMB, bspRFHWIsr); IntEnable(INT_RFC_HW_COMB);
If I send a Message:
RESULT bspRFSendMessage(uint8_t *Data, uint32_t AbsTime) { txCommand.status = IDLE; txCommand.pPkt = Data; txCommand.startTime = AbsTime;// HWREG(RFC_RAT_BASE + RFC_RAT_O_RATCH7VAL) = Time + 1100; // Timer Compare for tests RadioStatus = RFCDoorbellSendTo((uint32_t)&txCommand); if(RadioStatus != CMDSTA_Done ) return FAILURE_RFCORE_SYNC_START; return SUCCESS; }
ist seems to work. (On Real-Time Spektrum Analyser I can see the Packet.)
But only RFC_DBELL_RFCPEIEN_COMMAND_DONE of all activated Interrupts fires.
The INT_RFC_HW_COMB interrupts do not fires at all.
RAT Timer Interrupt fires only if the following code uesed bevor enabling:
HWREG(RFC_RAT_BASE + 0x0000005C) = (0x00000001 | (HWREG(RFC_RAT_BASE + 0x0000005C) & 0xFFFFFFFC)); // Activate Timer Interrupt generation
If I'm trying to receive a message, only RFC_DBELL_RFCPEIEN_COMMAND_DONE interrupt fires. And I'm unable to receive any message.
The meessages are on the air, RSA fo not lies.
RESULT_T bspRFStartSync() { rxCommand.endTime = bspRFGetRATTimer() + 15000; RadioStatus = RFCDoorbellSendTo((uint32_t)&rxCommand); if(RadioStatus != CMDSTA_Done ) return FAILURE_RFCORE_SYNC_START; return SUCCESS; }
Have I forgot to activate something?
Whole Radio SetUp:
RESULT_T bspRFCoreInit(){ configureXOSCHF(Power_ENABLE); // Prepairing for synchronisation of the RAT counter with RTC HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RTC_UPD_EN_BITN) = 1; /* Enable RF Core power domain and wait until it's on */ PRCMPowerDomainOn(PRCM_DOMAIN_RFCORE); while(PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE) != PRCM_DOMAIN_POWER_ON); OSCXHfPowerModeSet(HIGH_POWER_XOSC); PRCMPeripheralRunEnable(PRCM_DOMAIN_RFCORE); PRCMLoadSet(); while(!PRCMLoadGet()); dataEntry0.pData = (uint8_t*)&rxDataEntry0Buffer; dataEntry1.pData = (uint8_t*)&rxDataEntry1Buffer; { /* Generate Commands for future use, ony little pare of parameter changes during operation*/ // Set Commands descriprots in to commands setLenCommand.commandNo = CMD_PROP_SET_LEN; rxCommand.commandNo = CMD_PROP_RX_ADV; txCommand.commandNo = CMD_PROP_TX_ADV; getRSSICommand.commandNo = CMD_GET_RSSI; updateFSCommand.commandNo = CMD_UPDATE_FS; setAbortCommand.commandNo = CMD_ABORT; } { /* Generate Setup command */ propSetupCommand.commandNo = CMD_PROP_RADIO_SETUP; propSetupCommand.status = IDLE; propSetupCommand.pNextOp = NULL; propSetupCommand.startTime = 0; propSetupCommand.startTrigger.triggerType = TRIG_NOW; propSetupCommand.condition.rule = COND_NEVER; /* Command specific configuration */ propSetupCommand.modulation.modType = 1; // GFSK propSetupCommand.modulation.deviation = 250; // x 1 KHz says RSA (x 250 Hz deviation Says Datasheet ) // BaudRate = (symbolRate.rateWord * 24 000 000) / (symbolRate.preScale * 2^20) propSetupCommand.symbolRate.rateWord = 655360; // 1000 kbaudps propSetupCommand.symbolRate.preScale = 15; // Pre Scaler => 4 to 15 propSetupCommand.rxBw = 10; // 700 kHz RX bandwidth, 1 MHz Intermidiate Freq (see docs) propSetupCommand.preamConf.nPreamBytes = 2; // 2 bytes preamble propSetupCommand.preamConf.preamMode = 1; // Send 1 as first bit propSetupCommand.formatConf.nSwBits = 24; // 24 bits sync word propSetupCommand.formatConf.bBitReversal = 1; // propSetupCommand.formatConf.bMsbFirst = 1; // Send MSB first propSetupCommand.formatConf.whitenMode = 0; // No whitening // Added to command structure in PG2 propSetupCommand.config.frontEndMode = 0; // Differential Mode on antenna pins. propSetupCommand.config.biasMode = 0; // Internal RF bias. propSetupCommand.config.analogCfgMode = 0; propSetupCommand.config.bNoFsPowerUp = 0; // Power up frequency synth. propSetupCommand.txPower = TX_P_0_dBm; // propSetupCommand.pRegOverride = 0; } { /* Create CMD_FS command */ /* Command header configuration */ fsCommand.commandNo = CMD_FS; fsCommand.status = IDLE; fsCommand.pNextOp = NULL; fsCommand.startTime = 0; fsCommand.startTrigger.triggerType = TRIG_NOW; fsCommand.condition.rule = COND_NEVER; /* Command specific configuration */ fsCommand.frequency = 2400; // Whole frequency setting fsCommand.fractFreq = 0; // resolution: 1 MHz/(2^16) fsCommand.synthConf.refFreq = 0; // Divider settingdoes not exist in PG2, reference frequency default - 0 fsCommand.synthConf.bTxMode = mode; // Set freq. synth. in TX mode } { /* Create CMD_PROP_TX command */ /* Command header configuration */ txCommand.commandNo = CMD_PROP_TX_ADV; txCommand.status = IDLE; txCommand.pNextOp = NULL; txCommand.startTime = 0; txCommand.startTrigger.triggerType = TRIG_ABSTIME;//TRIG_REL_SUBMIT ;//TRIG_NOW;//TRIG_ABSTIME; txCommand.condition.rule = COND_NEVER; /* Command specific configuration */ txCommand.pktConf.bFsOff = 0; // Keep frequency synth on after TX done txCommand.pktConf.bUseCrc = 1; // Use CRC txCommand.pktConf.bCrcIncHdr = 0; txCommand.pktConf.bCrcIncSw = 0; txCommand.pktLen = MAX_LENGTH; // Length of the packet to send txCommand.numHdrBits = 0; // Disable header txCommand.startConf.inputMode = 0; txCommand.startConf.bExtTxTrig = 0; // do not use extarnal trigger txCommand.startConf.source = 0; txCommand.preTrigger.bEnaCmd = 0; // pre trigger disable txCommand.syncWord = 0x930B51DE; // Sync word to send txCommand.pPkt = packDummy; // Pointer to payload Currentky set to ZERO, must be updated by sending of the command } { /* Set the Data Entries common configuration */ dataEntry0.status = 0; // Pending - starting state dataEntry0.config.type = 0; // General Data Entry dataEntry0.config.lenSz = 0; // No length indicator byte in data dataEntry0.length = DATA_ENTRY_DATA_SIZE; // Total length of data field dataEntry1.status = 0; // Pending - starting state dataEntry1.config.type = 0; // General Data Entry dataEntry1.config.lenSz = 0; // No length indicator byte in data dataEntry1.length = DATA_ENTRY_DATA_SIZE; // Total length of data field /* Link the data entries togther in a circular buffer fashion */ dataEntry0.pNextEntry = (uint8_t*) (&dataEntry1); dataEntry1.pNextEntry = (uint8_t*) (&dataEntry0); /* Create Data Entry Queue and configure for circular buffer Data Entries */ dataQueue.pCurrEntry = (uint8_t*)(&dataEntry0); dataQueue.pLastEntry = NULL; /* Set read pointer to first entry */ readEntry = dataEntry0; } { /* Create CMD_PROP_RX command */ /* Command header configuration */ rxCommand.commandNo = CMD_PROP_RX_ADV; rxCommand.status = IDLE; rxCommand.pNextOp = NULL; rxCommand.startTime = 0; rxCommand.startTrigger.triggerType = TRIG_NOW; rxCommand.startTrigger.bEnaCmd = 0; rxCommand.startTrigger.pastTrig = 0; rxCommand.condition.rule = COND_NEVER; /* Command specific configuration */ rxCommand.pktConf.bFsOff = 0; // Keep frequency synth on after RX done rxCommand.pktConf.bRepeatOk = 1; // Go back into RX after RX done rxCommand.pktConf.bRepeatNok = 1; // Go back into RX after CRC Error rxCommand.pktConf.bUseCrc = 1; // Use CRC // rxCommand.pktConf.bVarLen = 0; // Expect variable length rxCommand.pktConf.endType = 0; // Packet is received to the end if end trigger happens after sync is obtained rxCommand.pktConf.filterOp = 0; rxCommand.pktConf.bCrcIncHdr = 0; rxCommand.pktConf.bCrcIncSw = 0; rxCommand.rxConf.bIncludeCrc = 0; rxCommand.rxConf.bAutoFlushCrcErr = 0; // Automatically discard packets with CRC error from RX queue rxCommand.rxConf.bIncludeHdr = 0; // Do not Include the length byte rxCommand.rxConf.bAppendRssi = 1; // Append RSSI rxCommand.rxConf.bAppendStatus = 1; // Append status byte rxCommand.syncWord0 = 0x930B51DE; // Sync word to send rxCommand.syncWord1 = 0x930B51DE; // Sync word to send rxCommand.maxPktLen = MAX_LENGTH; // Max packet length to receive rxCommand.hdrConf.numLenBits = 0; rxCommand.hdrConf.numHdrBits = 0; rxCommand.hdrConf.lenPos = 0; rxCommand.lenOffset = 0; #ifdef IS_BS rxCommand.endTrigger.triggerType = TRIG_ABSTIME; // TRIG ON Timer Event rxCommand.endTrigger.pastTrig = 0; //A trigger in the past is never triggered, or for start of commands, give an error<br> rxCommand.endTime = 0; // END TIME MUST BE HERE #else rxCommand.endTrigger.triggerType = TRIG_NEVER; // Never leave RX // rxCommand.endTrigger.pastTrig = 0; //A trigger in the past is never triggered, or for start of commands, give an error<br> rxCommand.endTime = 0; // END TIME MUST BE HERE #endif rxCommand.pQueue = &dataQueue; // Set the Data Entity queue for received data rxCommand.pOutput = (uint8_t*)&rxStatistics; // Set rx statistics output struct } /* Apply Patches for genfsk*/ // rf_patch_cpe_genfsk(); // rf_patch_rfe_genfsk(); // rf_patch_mce_genfsk(); /* Enable mode with support for GenFSK PROP commands... * Must be set to 3 before RFCORE is released from reset. */ HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE3; /* Enable clocks inside RF Core */ RFCClockEnable(); /* Start RAT timer */ rfc_CMD_SYNC_START_RAT_t StartRatCmd; StartRatCmd.commandNo = CMD_SYNC_START_RAT; HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = (uint32_t)&StartRatCmd;// CMDR_DIR_CMD(CMD_START_RAT); while (HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) != 0x7FF); while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Register Write, without this patch radio cannot send PROP commands*/ writeRfRegCommand.commandNo = CMD_WRITE_RFREG; writeRfRegCommand.address = 0x1128; writeRfRegCommand.value = 2; HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = (uint32_t)&writeRfRegCommand; while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Ping RF Core */ HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = CMDR_DIR_CMD(CMD_PING); /* Wait for Ping done */ while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Wait until done (because this is a direct command) */ while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Send CMD_PROP_RADIO_SETUP command to RF Core */ HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = (uint32_t)&propSetupCommand; /* Wait until command finished executing */ /* First wait until received, parsed and running on RF Core */ while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Wait until command is done executing */ while( (propSetupCommand.status & 0x0F00) != DONE_OK ); /* Send CMD_FS command to RF Core */ HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = (uint32_t)&fsCommand; /* Wait until command finished executing */ /* First wait until received, parsed and running on RF Core */ while( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) == CMDSTA_Pending); if( HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA) != CMDSTA_Done ) return FAILURE_RFCORE_INIT; /* Wait until command is done executing */ while( (fsCommand.status & 0x0F00) != DONE_OK ); /* Setup interrupt on RX_ENTRY_DONE and RX_ABORTED */ IntMasterDisable(); bspConfigureRfcInterrupts(); IntPendClear(INT_RFC_CPE_0); IntRegister(INT_RFC_CPE_0, bspRFDataQueueAndAbortIsr); IntEnable(INT_RFC_CPE_0); IntPendClear(INT_RFC_HW_COMB); IntRegister(INT_RFC_HW_COMB, bspRFHWIsr); IntEnable(INT_RFC_HW_COMB); HWREG(RFC_RAT_BASE + RFC_RAT_O_RATCH7CFG) = (RFC_RAT_RATCH0CFG_CH0MODE_COMP | (HWREG(RFC_RAT_BASE + RFC_RAT_O_RATCH7CFG) & 0xFFFFFFFC));// Activate Timer interrupt IntMasterEnable(); return SUCCESS; }
Thanks in Advance
D.Krush