Other Parts Discussed in Thread: CC1200
Hi there,
On the 73 page of the CC2420 datasheet, I found a register named "IOCFG1 (0x1D) – I/O Configuration Register 1". The "HSSD_SRC" bit can be configured to 3 for "Output I/Q after digital down mix and channel filtering". What does this output mean? In what format is this output generated?
I am wondering if this register can be configured to output the I/Q phase information so that I can recover the phase from the I/Q information.
Thanks,
Baofeng