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CC2541: CC2541 SFD delay

Part Number: CC2541

Hi,

I am using a CC2541 chip for communication in proprietary mode.

I want a trigger signal as soon as a packet is detected(SYNC word matched). Currently, I am using the SFD bit as a trigger by redirecting it onto a GPIO .But the latency between the the SFD bit going high and actual end of SYNC word in transmission is around 12-13 microsecond which is high.

Why does it have such a huge delay? Is this delay due to hardware(time required to demodulate, de-whiten the packets) ?

Is there anyway to reduce this delay and detect a packet quickly?

  • Hi

    How do you measure the delay?

    I have notified one of our radio expert to comment here.

    Cheers,
    Fredrik
  • I am using the SFD bit as a trigger and capturing the waveforms(SFD and packet transmission) on an oscilloscope. Knowing the packet format and the bit rate(1 Mbit/sec) I am able to mark the end of SYNC word. Comparing the end of SYNC word in transmission and SFD bit trigger, I got the delay between actual end of SYNC word and SFD signal going high to be around 12-13 microseconds.
  • This delay is in hardware, and it is caused by filtering and demodulation/data decision of the sync word. Data decision of the sync word is done to ensure exact match to the programmed sync word. This avoids most cases of falsely syncing to noise or interferers.

    Why is this delay a problem for you?

    I believe it is possible to reduce this delay by some microseconds by turning off the data decision of the sync word and basing the decision solely on correlation. We have not tested this, so we don't know for sure how much it will reduce the delay. Note that you will not get datasheet performance if you do this, and you do this at your own risk. You may get lots of false syncs, and to reduce that issue, you have to adjust the correlation threshold so that you get reduced sensitivity.

    To turn off the data decision of the sync word, you can set the SYNC_MODE field (bits 7:6) of MDMCTRL3 to 00. When you do this, you will have to raise the sync word correlation threshold from the recommended default for your setting. This is controlled by the CORR_THR bits (bits 4:0) of MDMCTRL0. I don't know what it should be; you have to experiment yourself.

    Due to the worsened and unknown performance of this setting, I don't recommend using it. But it may be used for testing if it helps you.

  • Thank you for your help.
    The modification you suggested helped in reducing the delay by around 1-2 microseconds.
    Is there any other way to reduce the delay more significantly?
    Would it be even possible to get a delay of around 3-4 microseconds or is it impossible due to hardware latencies of the chip?

    Correction: CORR_THR bits of MDMCTRL1 not MDMCTRL0.
  • No, this is not possible; I am not aware of any other ways to reduce the latency. The digital filters alone give more than 3-4 microseconds delay.

    If you let me know why this delay is an issue, I could see if there are other ways of solving your problem.
  • I just want to get a signal as quick as possible when a valid packet is detected
  • I understand that. But what will you be using this signal for? Why is 12-13 us after the end of the sync word too late?