Part Number: CC1310
Tool/software: Code Composer Studio
I built a number of PCBA that are based around the CC1310 and found that when I go to program them i get a error saying I can not connect to the target. I have update the configurations file but seem to keep betting an error.
"(Error -242 @ 0x0) A rot subpath could not be accessed. The board Configuration file is probably incorrect."
I can flash a Launchpad from another launch pad but cannot flash a my PCBA without getting this error. The circuits are the same and the chip is the same, I see no reason why it wont work from a hardware standpoint.
Any Help understanding why the configuration files need to be switched and how configuration files effect debugging in CCS would be fabulous.
In reply to Nicholas Johnson72:
In reply to TER:
The board is basically identical, but I don't fully understand how to set up configuration files in CCS. I have downloaded and installed TIRTOS V2.14 for teh CC13xx but still have the same errors. I'm really not sure what the errors are referring to unfortunately.
maybe you are using Code Composer 7 and a newer version XDCTools? Please try a combination CCS 6.2 + TI-RTOS 2.14 + XDCTools 3.31.x. Especially code composer often breaks compatibility to old TI-RTOS products.
In reply to Richard W.:
I followed you recommendation, it seems strange that TI advertises that the SimpleLink TIRTOS would break iwth nwer version of CCS. Regardless anything is posible with IDE's and software. So I opened CCS6.2 with the Ti-RTOS 2.14 and kept the standard XDCTools3.31.x. I have the same errors.
This error is directly referring to the configuration of the project. When I go to change the Project configuration I con NOT Save the chnages!
I try and change Cortex.C.CC1310F128_rev1 to just the simple link CC1310F128 as this is what works with the launch pad, but again It will not save. Do you know if I need to change permission or create a new project and import these files into it to change the CCS general target.
I'm no longer getting the Target configuration for the Debugger (The file in the project to the correct target device, yet this doesn't seem to have any effect on the error.
Let me know if this looks correct to work with the CC1310f128 IC.
When I go to Verify target I revive the fallowing error.
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity
-----[Print the board config pathname(s)]------------------------------------
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioxds110.dll'.
The library build date was 'Jul 27 2016'.
The library build time was '18:31:37'.
The library package version is '6.0.407.3'.
The library component version is '18.104.22.168'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU pin.
The controller cannot monitor the value on the EMU pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
An error occurred while hard opening the controller.
-----[An error has occurred and this utility has aborted]--------------------
This error is generated by TI's USCIF driver or utilities.
The value is '-242' (0xffffff0e).
The title is 'SC_ERR_ROUTER_ACCESS_SUBPATH'.
The explanation is:
A router subpath could not be accessed.
The board configuration file is probably incorrect.
This had lead me to try and double well now triple check the hardware for the JTAG header.
Above is my PCBA's Configuration. I have checked this and the pins to the MCU for both this design and the Reference Design for the CC1310 Launch pads and have found they matched. Yet I did measure the voltage drop form the CC1310 Debugger and the target DUT. The Debugger produced 3.3V yet at VDD on the JTAG head on the DUT (Target) had 2.3V, a significant loss in voltage. I'm checking to make sure the supplier didn't mix a resistor up with a capacitor now.
Otherwise the schematic checks out and the Altium PND analysis shows there are no voltage leaks form the power rail to ground.
This is what I have completed today, I need to switch projects for a pitch presentation tomorrow, but will hit this again hard tomorrow night. Any help or insight to expedite why I cant get the boards communicating with CCS so I can start the fun part the software bring up and testing. :)
Thank you, Nicholas
Ok, so I spent time tonight working on addressing the voltage issue and found that the way I have the JTAG connector keyed is backwards to how the debugger keys the connector. I flipped the connector on a board and was able to program it and communicating with SmartRF. I have updated the key for future PCBA runs, but was wondering if you have a better datasheet than FTSH-105-01-DV-K digikey.
Thank you for all the help.
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