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CC3100: Host SPI porlarity=0 and phase=1?

Part Number: CC3100
Other Parts Discussed in Thread: MSP430F5529,

Hi experts,

I read swru455 and swru368 Network Processor Guide and it specified that the polarity and phase of Host SPI is mode 0 [PHA=0,POL=0]. However from my test and from the example of CC3100SDK, it is POL=0, PHA=1. (UCCKPH)

I attach the example from CC3100SDK for MSP430F5529 as below:

Fd_t spi_Open(char *ifName, unsigned long flags)
{
    /* Select the SPI lines: MOSI/MISO on P3.0,1 CLK on P3.2 */
    P3SEL |= (BIT0 + BIT1);

    P3OUT |= BIT1;

    P3SEL |= BIT2;

    /* Enable pull up on P3.3, CC3100 UART RX */
    P3OUT |= BIT3;
    P3REN |= BIT3;

    UCB0CTL1 |= UCSWRST; /* Put state machine in reset */
    UCB0CTL0 = UCMSB + UCMST + UCSYNC + UCCKPH; /* 3-pin, 8-bit SPI master */

    UCB0CTL1 = UCSWRST + UCSSEL_2; /* Use SMCLK, keep RESET */

    /* Set SPI clock */
    UCB0BR0 = 0x02; /* f_UCxCLK = 25MHz/2 */
    UCB0BR1 = 0;
    UCB0CTL1 &= ~UCSWRST;

-----------------------------------------------------------------

Is it PHA=0 or 1?

Thanks,

Jo