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UCC28C54: Voltage drop under load

Thomas Nilsson
Prodigy 195 points
Part Number: UCC28C54


Hi

I have made a design with the UCC28C54 following the typical application example and design guide lines from page 26 on in the datasheet below. Please see the attached schematics.

It seems to work as intended apart from the output voltage dropping a lot and constantly over the output range. See attached output voltage diagram.

Why does the voltage drop this much and what can be done about it?

T1 is 1.55mH with, NPS = 9.67, NPA = 7.73

Thanks!

4403.Schematic.pdf

www.ti.com/.../ucc28c54-q1.pdf

  • 0
    TI__Genius 15646 points

    Hi Thomas,

    -Why are you using an opto-coupler across the isolation barrier? According to your schematic, you are using PSR (Primary side Regulation), through the auxiliary winding to the FB pin with a voltage divider resistors (R19, R20 and R28). Therefore, SSR (Secondary side regulation) is not needed. Please, disconnect Q8 from FB pin, or remove the optocoupler from your converter and check if the issue is fixed.

    -What is the reason of Q7 connected between the drain and source of Q6?

    -D8 Zener diode is connected for protection? Nothing wrong with that, just keep in mind it will dissipate some power.

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    Hi Manuel

    Thanks for your response!

    Q10, Q8 and related resistors are not mounted. Sorry, shouldn't have been in the schematic.

    VDD is 15 volt during normal operation, so D8 should not dissipate any power.

    Q7 is optional to Q6. In this case Q6 is mounted as it says in the schematic.
    Q7 is for future/experimental use with higher voltage TVDs snubber circuit to improve efficiency at lower/medium loads. But first of all the general design with an RCD snubber needs to work properly.


    Brgds, Thomas

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    Hello Manuel

    Any ideas why I am seeing this voltage drop?

  • 0 in reply to Thomas Nilsson
    TI__Genius 15646 points

    Hi Thomas,

    -What is the maximum load that your converter was designed? Is your main inductor designed at that power level? From your data collected, I saw that you tested for Iload=9A (Pout=108W). If the converter is overloaded, the controller can go in current mode and then the output voltage will go out regulation. Please, verify your inductor value with the equation below.

    After your inductor value is verified for the power level at full load, please take waveforms at full load for (VDD-PGND), (CS-PGND), (DRV-PGND), and (VOUT-GND). Put the trigger on VDD channel, rising, threshold UVLO (14.5V) and use a time scale of the 1/fsw, where fsw is the switching frequency (80KHz according to your RT/CT values). These waveforms at full load will let us know if there is any fault in the controller. But first verify your inductor value.

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    Hi Manuel

    It is designed for a maximum load of 7A, 84W. Lp is calculated to 1.55mH and the converter will work in DCM at lower loads and transition to CCM at approx half the maximum load. But the issue with voltage drop seems to be the same both in DCM and in CCM mode.

    I am not sure what you mean that the controller can go out of control if it goes into current mode. It should be running in current mode all the time, right!?

    I'll get back with the waveforms.

    Thanks!

  • 0 in reply to Thomas Nilsson
    TI__Genius 15646 points

    Thomas,

    -Yes, please take those waveforms at full load (7A/84W) for a better debug.

    -Yes, the controller will be in "current mode control". What I tried to explain is that if the converter is overloaded (loaded with higher current than designed), it can lose regulation of the output voltage, but it will keep switching to keep the output load current constant ("current mode").

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    Hello Manuel

    Sorry for a long delay. We hade a new PCB layout made and a new custom transformer to improve leakage inductance.

    However, our problem remains and I am leaning towards some kind of disturbance rather than a schematic design issue. I have however tried to follow all PCB layout design rules and recommendations in the data sheet. I am following the datasheet of the Q-version as that application design is very similar to ours and I found that datasheet a bit more comprehensive and detailed.

    Please find attached the waveforms as requested, plus a few extra ones that I thought might be good to have.
    Also please note the waveforms are recorded at 5A load, not 7A, reason being we have the highest power at 5A. 

    I am thinking maybe the disturbances on the Comp are the reason for the problems. I have tried a few different things trying to dampen those, but without success.

    I also made a test with a step change in load, similar to the 250mA -> 2,7A step load change in the data sheet, and observed the Comp waveform, it looks very similar in our case and in the datasheet, not more disurbances on the signal in our case compared to the datasheet. But maybe that doesn't say much. I will add that waveform in another post as I just realised and didn't save that one.

    I would really appreciate some help on this as I feel I have tried "everything".

    Thanks! Thomas

    VP24-Screenshots New Board 5A Load.zip

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    And in addition to the other waveforms posted earlier today, here's the Comp waveform during a 0,1 --> 2,6 --> 0,1 A step change.

    As compared to the datasheet Figure 9-21. My pulse is a bit longer and the voltage step in my case is ca 1 volt while 1,5 in the datasheet, but this is normal I guess considering different designs.

    Comp @ 0,1 - 2,5 - 0,1 step load

  • 0 in reply to Thomas Nilsson
    TI__Genius 15646 points

    Hi Thomas. I will be back to you Monday morning.

    Thank you

  • 0 in reply to Manuel Alva Hernandez
    Prodigy 195 points

    Great, hope you had a nice weekend!

    Meanwhile one more update. 

    I made a "minor" design change, connected PGND and GND together, disconnected VAux from FB and connected VOut to FB instead. Hence, I changed the design from an isolated to a non-isolated topology. 

    Then it worked like a charm straight away.  A no load voltage of 12.9V dropped to only 12.5 at full 7A load. Well within my goal of max 1V drop.

    Hence, it appears to me the problem is somehow related to the feedback signal from Vaux, I am assuming disturbances. 

    Question is, where did I go wrong and how can I fix it?

    Thanks, Thomas

  • 0 in reply to Thomas Nilsson
    TI__Genius 15646 points

    Hi Thomas,

    The first waveforms that you showed me shows the converter switching correctly. This means that something is wrong with the feedback resistor divider and the output voltage reflected value. Please, verify your FB divider resistor.

    Thank you