In the previous posts in the Industrial DACs series we’ve been looking at how to build and protect 3-wire industrial analog outputs. Today, we will change gears and look at 2-wire analog outputs.
Figure 1: Simplified drawing of typical 2-wire transmitter
Figure 1 shows a simplified schematic of the most common approach for designing a 2-wire analog output. For many analog engineers, this 2-wire approach is more challenging to understand than its 3-wire and 4-wire siblings. Most of the difficulty in understanding this circuit is derived from the lack of ground symbol in the transmitter circuit - something seemingly reminiscent of a “challenge question” from a college circuits course.
In order to understand the circuit better, Figure 2 has included a transmitter ground symbol, which is separate from the supply ground, and a few helpful current and voltage markers that we’ll use to derive the transfer function of the circuit.
Figure 2: Analysis of typical 2-wire transmitter
Amplifier A1’s chief purpose in “life” is to do whatever it has to on the output to ensure that the inverting and non-inverting input terminals are equal. With this in mind we can assume that under normal operating conditions V+ and V- will be equal. And since V- is connected to loop ground, the V+ potential will also be ground.
Since V+ is loop ground, or 0V, we can easily define the currents flowing through R1 and R2 as shown in Figure 2. Assuming A1 is an ideal amplifier, the entirety of these currents sum and form i1, which is defined in the equation below.
A1 will drive BJT Q1 such that some current flows through R4 along with the return current of all of the components in the design to create the current labeled i2 in Figure 2. Keep in mind that in order to comply with the common 4-20mA communication standard, the current consumption of all components in the design must be <4mA.
Given that the low sides of resistors R3 and R4 are connected to the same node and the high side of each resistor is connected to the input terminals of A1 (which must be at the same voltage potential), we can infer that the voltage drops across R3 and R4 must be equal. We can use this to calculate the value of i2, as shown:
So we can easily see that i2 is simply i1 gained up by the ratio of R3 to R4. This current gain is useful because it allows favorable high impedance loading conditions of the DAC and regulator output, as well as most of the output current to be sourced from the loop directly, rather than from the transmitter itself.
i1 and i2 will sum to form the output current, or Iout. The equations below show this summation and simplify the result to deliver the system transfer function.
The DAC should be selected based on DC accuracy, which is expressed by the static specifications in the datasheet, and minimal current consumption. Some strong candidate DACs for 2-wire transmitter designs are:
Amplifier selection should primarily be based on low input offset voltage and low input bias current since both parameters can skew the ideal transfer function. As with the DAC selection, the amplifier should consume minimal current. Here are a few good choices:
In my follow-up post next month, we’ll look at designing protection solutions for 2-wire transmitters.
For more information on component selection, PCB layout and measured results on an example discrete 2-wire transmitter design, check out TIPD158. You can also see the industry’s first complete DAC macro models in action.
If you stumbled upon this post while debugging a 2-wire transmitter, I encourage you to check out this series by my colleague, Collin Wells, about common pitfalls in these designs.
Does Iout change when Vloop changes, such as increasing? I think it will be mainly related to regulater. The current of rugulater flows into ground increases. How to design regulater? How does Iout change when vloop changes?
user4164924 : I'm not sure which node is being aliased as Vloop in your comment. IOUT is independent of any supply voltage on the loop and is purely controlled by the loop amplifier and the voltages applied to it's input in normal operation. There are compliance voltage implications, as with all current sources, that must be understood which could lead to the loop supply voltage impacting IOUT either by means of collapsing the regulator or by changing the region of operation the loop pass transistor is in.
Just look at Figure 2.I just want to know if VLOOP changes, will IGND（current of GND） of regulator change? If IGND changes, then IOUT will certainly be affected. How do you avoid the change of IGND when VLOOP changes?
user4164924 : Apologies for missing the label. It's been a long time since I wrote / drew this. Assuming the circuit is designed to operate with sufficiently low quiescent current versus the "offset current" defined by VREG and R2, the current consumption of the regulator - and any other component for that matter - will not have any impact at all on IOUT. The IOUT current is regulated by the feedback loop around amplifier A1. If more current were coming through the loop ground, then less current will pass through Q1. R4 serves as the sense resistor which is in series with both Q1 and the loop ground.
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