<?xml-stylesheet type="text/xsl" href="https://e2e.ti.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>SAR ADC response times: Interface topology makes a difference (Part 2)</title><link>/blogs_/archives/b/precisionhub/posts/sar-adc-response-times-interface-topology-makes-a-difference-part-2</link><description>In my previous blog post, I explained a simple serial interface in which each data bit is transferred as it is resolved. I also noted that this type of interface is usually restricted to lower resolution or lower speed.

Most of the modern, high-resolution</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><item><title>RE: SAR ADC response times: Interface topology makes a difference (Part 2)</title><link>https://e2e.ti.com/blogs_/archives/b/precisionhub/posts/sar-adc-response-times-interface-topology-makes-a-difference-part-2</link><pubDate>Wed, 01 Feb 2017 05:43:34 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:3ab1b8a5-a668-44bf-b559-a8eebd80651d</guid><dc:creator>Kaustubh Gadgil</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Hello Keruru,&lt;/p&gt;
&lt;p&gt;Thank you for your interest in this blog. You just caught a typo error that had escaped my attention earlier.&lt;/p&gt;
&lt;p&gt;&amp;#39;tTHROUGHPUT = tCONV + n* tCLK (as long as n*tCLK &amp;lt; tACQ – i.e., for slower clock speeds)&amp;#39; is incorrect. It should read &amp;#39;tTHROUGHPUT = tCONV + n* tCLK (when n*tCLK &amp;gt; tACQ – i.e., for slower clock speeds)&amp;#39;.&lt;/p&gt;
&lt;p&gt;I will get the blog updated soon.&lt;/p&gt;
&lt;p&gt;Appreciate your attention!&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Kaustubh&lt;/p&gt;
&lt;img src="https://e2e.ti.com/aggbug?PostID=666929&amp;AppID=930&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: SAR ADC response times: Interface topology makes a difference (Part 2)</title><link>https://e2e.ti.com/blogs_/archives/b/precisionhub/posts/sar-adc-response-times-interface-topology-makes-a-difference-part-2</link><pubDate>Wed, 01 Feb 2017 02:27:33 GMT</pubDate><guid isPermaLink="false">cb01d8b2-d089-468d-babb-77d1d8683490:3ab1b8a5-a668-44bf-b559-a8eebd80651d</guid><dc:creator>Minori Hanashima</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;One question regarding the equations:&lt;/p&gt;
&lt;p&gt;tTHROUGHPUT = tCONV + tACQ (as long as n*tCLK &amp;lt; tACQ – i.e., for faster clock speeds)&lt;/p&gt;
&lt;p&gt;tTHROUGHPUT = tCONV + n* tCLK (as long as n*tCLK &amp;lt; tACQ – i.e., for slower clock speeds)&lt;/p&gt;
&lt;p&gt;Is &amp;quot;n*tCLK &amp;lt; tACQ &amp;quot; applied to both of &amp;quot;faster clock speeds&amp;quot; and &amp;quot;slower clock speeds&amp;quot; ?&lt;/p&gt;
&lt;img src="https://e2e.ti.com/aggbug?PostID=666929&amp;AppID=930&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>