Three guidelines for designing anti-aliasing filters

RE: Three guidelines for designing anti-aliasing filters

NIMIT VACHHANI — Fri, 26 Feb 2021 07:17:54 GMT

Hello Guys,

I am currently using ADS1235evm connected to my load cell. Now I want to achieve higher accuracy of measurement with this board. Can you please guide me what is an ideal approach to achieve this result. I need 200,000 counts of accuracy at 10 samples/sec.

Do I need an extra analog filter to be placed at load cell output and then give this filter output to my ADC1235 input ?

I have connected ADS1235evm to my micro-controller.

RE: Three guidelines for designing anti-aliasing filters

Bruce Lott — Thu, 09 Jun 2016 22:47:15 GMT

Ryan,

Eq. 2 appears incorrect. As the tolerances become tighter, the first term will go more negative, reducing the calculated CMR. Obviously, tighter tolerances should allow CMR to approach its perfectly matched (theoretical) value, i.e. the first term should approach 0. Also, the second term goes negative for F < Fc, which doesn't make sense to me. Below Fc, CMR should approach 0, I would think.

I agree with Eq. 3, but the text preceding it says to make Cdiff = Ccm * 10 to make the differential-mode cutoff a decade lower than the common-mode cutoff. This factor for Cdiff would appear to make Fc(diff) = Fc(cm) / 20, which doesn't match the text. Of course, since the article started by selecting a cutoff frequency for anti-aliasing, I would suggest this as the desired differential-mode cutoff, and say that the common-mode cap values should be reduced by a factor of 10 so that the common-mode filter mismatch due to RC tolerances has little impact on the differential-mode filter response.

The conclusion I draw from reading some other articles about single-pole anti-aliasing filters for differential-input A/Ds, is that with perfectly matched components, one wouldn't need a differential-mode cap at all, and with no common-mode noise, one would need *just* the differential-mode cap. But in the real world, we need both: differential-mode cap for the "main" anti-aliasing function, and common-mode caps to filter as much common-mode noise as possible without significantly affecting the anti-aliasing filter response [due to common-mode to differential-mode conversion]. It would be interesting to study the effects of varying the RC tolerances and Ccm to Cdiff ratio to find an optimal solution (for a given noise environment).

RE: Three guidelines for designing anti-aliasing filters

Bruce Lott — Wed, 08 Jun 2016 14:43:01 GMT

Barry,

You are correct that there is roll-off below the cut-off frequency (-3dB). For RC low-pass, Vo/Vi = 1/SQRT(1 + (F/F0)^2). So, at 0.1xF0, the attenuation is 0.005 (0.5%); at 0.01xF0, it's 0.00005 (good for about 14+ bits); and at 0.0055xF0, it's good to 1LSB in 16 bits.

If you know the frequency of interest (single frequency, or a reasonably narrow FFT bin), you can compensate for the error by using a formula or table, e.g. at 0.1xF0, just divide by 0.995, etc.

Another source of roll-off error is the decimation filter (sinc3 filter typical), if its cut-off isn't much greater than the highest frequency of interest. This can be similarly compensated for.

RE: Three guidelines for designing anti-aliasing filters

barry rowland — Sun, 17 Jan 2016 16:56:53 GMT

Just a thought about single-pole filters, and 'flat':

An RC filter is never 'flat', it has roll-off beginning at any finite frequency, correct?

It looks like the amplitude error of a single-pole filter, let's say 1 kHz 3 dB point, at 100 Hz seems to have about 1% attenuation, and at 10 Hz, it's still .01% ... therefore, it seems that we can have an error of 1 LSB at only 13 bits resolution, at 10 Hz... to get useful 16-bit resolution, the bandwidth is down to a couple of Hz.

I think that we often use delta-sigma converters for high-resolution applications, so it seems that a single-pole filter could limit accuaracy at relatively low frequencies, relative to the 3 dB point? Is this reasoning at all correct?