Is it possible to parallel two op amps to get twice the output current?

We get this question periodically on our E2E forums. Though we may answer with a qualified “yes,” it tends to make us shudder just a bit. It can be done… but with great care. So let me come quickly to a key point. Don’t use the simple circuit on the left. Directly paralleling inputs and output of two op amps is sure to start a serious argument between the two. Differing offset voltages will cause them to fight over the correct output voltage. They may burn all their output current capability in the battle with one output current (sourcing) flowing into the other (sinking current).

Figure 1b has a chance. Op amp A1 is the “master” and A2 is the so-called “slave,” replicating the output voltage of the master. R3 and R4 promote reasonably equal sharing of the load current, even though A2’s output may be slightly different. Feedback is connected on the load-side of R3 and R4 so their voltage drop is corrected. You lose some output voltage swing capability in the I∙R drop on these resistors so you will be tempted to make them low in value. But the offset voltage of A2 will cause extra quiescent current equal to Vos/(R3+R4). It’s a tricky tradeoff.

Be very cautious with high speed signals. You want A2 to accurately replicate the output of A1. If the signal moves too fast, the phase shift of A2 will cause differing output voltages and wasted current. It’s important to avoid slewing. If necessary, add an R-C filter at the input so the fastest rate of change on the output of A1 is well below slewing speeds. The dynamic behavior of two amplifiers may not match well during slewing.

Don’t use older generation op amps that have output inversion (phase reversal) behaviors. If A1 can overdrive the input common-mode range of A2 and its output inverts the result is ugly.

Above all, check the behavior of your circuit thoroughly. SPICE may tell you whether you have a basic working circuit, but op amp macro-models may not accurately predict the quirks that could befall this circuit. Build a breadboard and check all signals and conditions carefully. If your op amp is multi-sourced, consider that not all manufacturers’ devices behave exactly the same. (But, of course, you have only one source for op amps, right?)

Do you think I’m a bit leery of paralleling op amps? Well, yes… call me leery. It can be successful but proceed with caution. I recommend that you consider an easier path—using an op amp with more output current. Here are a few possibilities:

  • TLV4111  300mA, 6V. CMOS Op Amp.
  • BUF634   G=1 buffer, 200mA, 36V.  Used inside the feedback loop of standard op amps.
  • OPA547   500mA, 60V Op Amp. Adjustable current limit.
  • OPA564   1.5A, 24V Op Amp, 17MHz GBW.
  • OPA548   5A, 60V Op Amp. Adjustable current limit.

Have you successfully paralleled op amps? Or do you have scars from trying? Comments welcome.

Thanks for reading,

Bruce       email:  thesignal@list.ti.com

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  • Percy, your gues sis right, if there are different propagation times, then the two gates might have complementary output for a short time. Using gates from the same package should indeed minimize the effect. Output series resistors will reduce this, but also reduce the maximum current then and/or increase the output voltage drop.

    On the MSP430 processors, often two output port pins are used in parallel, not so much to increase the fan-out, (the MSPs can drive up to 40mA per pin, depending on supply voltage and tolerable output voltage drop) but rather to reduce the voltage drop at medium currents.

    However, for standard gates, it might be an idea to change the technology rather than paralleling gates. (e.g. HCT instead of LS)

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  • Percy, your gues sis right, if there are different propagation times, then the two gates might have complementary output for a short time. Using gates from the same package should indeed minimize the effect. Output series resistors will reduce this, but also reduce the maximum current then and/or increase the output voltage drop.

    On the MSP430 processors, often two output port pins are used in parallel, not so much to increase the fan-out, (the MSPs can drive up to 40mA per pin, depending on supply voltage and tolerable output voltage drop) but rather to reduce the voltage drop at medium currents.

    However, for standard gates, it might be an idea to change the technology rather than paralleling gates. (e.g. HCT instead of LS)

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