In my last post, I discussed the string DAC architecture and its tendencies― if you missed it you can view that post here. This post will focus on two very similar architectures, the R-2R DAC and the MDAC.

Recall that the big limitation of the string DAC is the challenge associated with realizing a high resolution design and maintaining linearity. The number of resistors required for the string DAC increases exponentially as resolution increases, unless clever design tricks are implemented like cascaded resistor strings or interpolating amplifiers. The R-2R architecture directly addresses this problem by utilizing a binary weighted resistor ladder structure, as illustrated in Figure 1:

**Figure 1: Binary weighted resistor structure**

Each bit of resolution of the DAC is made of one set of R resistor, 2R resistor, and 1 switch that moves between the reference voltage and ground creating a voltage divider at the output node. Typically there is an on-silicon output buffer included. If you’re having a hard time understanding how the binary weighted divider works, I recommend creating this circuit in TINA-TI where you can simulate each switch position.

The R-2R DAC sees a variable impedance at the reference node, so a reference buffer is a requirement for applications where the DAC output is going to be changed very frequently in order to keep reference settling time from impacting DAC output settling time. Usually this buffer is included on silicon, just like the output buffer, but make sure you consult your device’s datasheet before making any assumptions.

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The MDAC, or multiplying DAC, as seen in Figure 2, uses a very similar topology – the same R-2R ladder in fact – except that the position of the reference input node and the output node are swapped. This change makes the R-2R ladder a current divider rather than a voltage divider. Because of this a transimpedance output stage is required to convert from current output to voltage output. Typically this buffer is not included on silicon but the feed-back resistor required for the transimpedance stage is included. Featuring the feedback resistor on silicon helps to ensure resistor matching to the rest of the R-2R ladder in terms of both value and drift behavior.

Not including an output buffer may seem like a disadvantage to the MDAC but in many ways it is actually quite helpful. Moving the amplifier to outside the device allows for great flexibility in design, applications with relaxed requirements can choose cheaper amplifiers and save money versus the price of a fully integrated solution. Meanwhile, in high-performance systems it is beneficial to utilize discrete amplifiers that are made on strong pure-analog processes.

**Figure 2: Multiplying DAC topology**

As far as performance tendencies go, the R-2R and MDAC architectures have very similar properties and we’ll discuss them simultaneously.

Since there are fewer resistors in these designs we can implement a much more comprehensive trimming scheme to achieve very strong linearity. Trimming circuits also take up space, though, so the R-2R and MDAC packages tend to be larger than the string DAC.

The number of switches moving in the R-2R and MDAC designs is code-dependent. In some cases, every switch of the DAC may have to move to increment to the next code which will create much higher glitch energy than the string DACs.

Some things to remember about the R-2R DAC and MDAC:

- Excellent INL/DNL
- Medium to high glitch energy
- Larger packages

The R-2R and MDACs find homes in virtually any application that is very high performance. That includes industrial programmable logic controllers, automated test and measurement equipment, precision instrumentation, and various other applications. Since the MDAC does not feature reference or output buffers it can deliver good results in medium speed applications as well such as waveform generation or AC attenuators. If these devices are of interest to you be sure to check out a few TI R-2R DACs and MDACs such as: DAC8811, DAC8822, DAC8734, DAC9881, DAC8881, or DAC7654.

This post finishes out the discussion of the DAC basics. Tony Calabria will continue the DAC Essentials series with a deep dive into glitch and glitch reduction in the next few posts so stay tuned.

As always, leave your comments in the section below if you’d like to hear more about anything mentioned in this post, or if there is something you would like to see included in a future post!

A / The structure of the ladder can be used to accomodate other divisions than binary, such as decimal R/9R ladders.

B / For very high resolution MDACS, the R/"R ladder reaches limitations. Thus a structure combining three cascaded

sections was used:

* The first 4 MSB's are decoded in 15 equal value resistors;

* The following 12 bits are in pure R/2R chain

* The last 4 LSB's are encoded in resistors in 1-2-4-8 weights

to reach eventuelly 20 bits.

@Eric Fletcher That's a great point ! With log or other values you can create a uLaw or other nonlinear output. -Lee

Great writeup

I am wondering if there exists a Graycoded DAC to avoid large glitches at increments of 1 bit.

I appreciate all of your comments! You've each brought up very interesting topics, maybe I can create a future blog post about some of the now-public techniques used to create interesting looking DACs.

@Eric Fletcher: You are correct, there are many tricks to be employed to realize higher resolution devices and I'm glad you brought it up. Many people consider DACs to be straight forward and simple devices, and they certainly come across that way, but these clever tricks are pretty exciting to consider. The MSB segmentation technique you mentioned are used on some TI DACs - you can see this in the DAC8811 datasheet. Unfortunately I cannot openly discuss some of the less obvious techniques since they're sometimes considered the "secret sauce" for a device.

@Lee Studley: Thanks for reading. A non-linear DAC could be an interesting topic...do you have an application in mind where you would like a non-linear output?

@Harry Croon: To my knowledge there are not any R-2R based DACs that use gray-code weights on the R-2R ladder. It is a very interesting idea and would help prevent "regular" major carry glitch from sequential values but you would be relocating that major carry transition to another arbitrary location. I can still see this being useful in some applications though. If such a device did exist, I would expect that it comes across pretty transparent to the user via the datasheet. Instead it would probably just look like an "ultra-low glitch" device.

@Lee Studley

Back at ADI, we created decimal MDAC's, like the 3 &1/2 digits AD7525 ( no longer available ).

What concerns Log, we used an other technique, which was to extend the digital input word of

8 bits to 17 bits by addings & shiftings and then select in the serie the words corresponding to

a Log/dB's scale from 0 dB to - 89.9 dB's, with 240 steps of 0.375 dB.

Resulting products were:

* AD7110 (a custom product for Bang & Olufssen in Denmark) / discontinued

* AD7111 ( pin compatible with linear 8 bitter AD7523 ) / discontinued

* AD7112 ( dual 7111, pin compatible with linear 8 bitter AD7524 ), still available today !

* AD7115 ( decimal Log, 0 to - 20 dB's, 200 steps of 0,1 dB ) / discontinued.

>@Lee Studley: Thanks for reading. A non-linear DAC could be an interesting topic...do you have an application in mind where you would >like a non-linear output?

This is a very late comment, but my first digital reverb design ~1982 used an 8bit uLaw companding ADC DAC combination. This way you could get good resolution at lower audio levels, and louder levels scaled back, using only 8bit SRAM which was hard to get in large device back then. Good read: www.dspguide.com/.../5.htm

@Lee Studley: Thanks for sharing, that makes good sense.

The blog is great.

One question: Since there are fewer resistors is R2R and MDAC, why larger packages are needed?

Thank you!

@tendo ren: That is a very good question!

As I briefly mentioned in the blog series, the string DAC frequently implements other tricks like segmentation, cascaded resistor strings, or interpolating amplifiers to augment the resolution of the basic resistor string. A 16-bit string DAC, for example, quite frequently doesn't actually have 2^16 resistors. Instead, maybe only 8 bits or so of the DAC are in the resistor string and the rest come from other novel tricks that help bring the size down. Furthermore, a trim program either doesn't exist or is very minimal for a string DAC.

The R-2R and MDAC structures, however, really do use the structures I've illustrated in the blog series. Since these designs use fewer resistors it is possible to implement a very comprehensive trim scheme for each resistor to deliver strong linearity. This trim scheme also takes up space, though, and is what usually contributes to the size of the R-2R and MDAC structures being larger than their string brethren.

The second figure is not correct!

The MSB is the LSB and vica versa.

At the correct LSB side must be conneced an additional 2R resistor to ground.

@user4252298

You are correct, of course. Copy/paste mistake from old graphics. Updated. Thanks.