Get Connected: The basics of protecting RS-485 against ESD


Welcome back to the Get Connected blog series on Analog Wire. In my last post, I discussed fail-safe biasing of differential buses and how to implement fail-safe biasing in your designs. In this post, I’ll look at protecting your differential bus against system-level transients using a transient voltage suppressor (TVS) diode and pulse-proof resistors.

Industrial networks such as RS-485 are expected to withstand harsh system-level transients in their end applications without being damaged. Damage can occur from electrostatic discharge (ESD) during handling, interruption of inductive loads, relay contact bounce and/or lightning strikes. You can protect your industrial design against these transient events through the addition of external components on the differential bus.

Let’s look at the International Electrotechnical Commission (IEC) ESD 61000-4-2 system-level ESD test that manufacturers use to test for robustness. There are two types of testing methods involved with the IEC ESD test: contact discharge and air discharge. The contact ESD test discharges an ESD pulse from an IEC ESD gun directly onto the device under test (DUT). The air ESD discharge test involves moving the charged ESD gun toward the DUT until the air breaks down enough to allow conduction of the ESD strike between the ESD gun and the DUT. IEC ESD testing is performed with both positive and negative polarities, and a passing score is not possible until both polarities survive at a single level. Table 1 shows the IEC 61000-4-2 ESD test-voltage and peak-current levels.

Contact discharge

Air discharge

Level

Test voltage (kV)

Peak current (A)

Level

Test voltage (kV)

1

2

7.5

1

2

2

4

15

2

4

3

6

22.5

3

8

4

8

30

4

15

*

Special

Special

*

Special

*This is an open level. The level has to be specified in the dedicated equipment speciation. If higher voltages than those shown are specified, you may need special test equipment.

Table 1: IEC 61000-4-2 ESD test voltage levels

 

Figure 1 depicts the basic shape of the IEC ESD pulse and shows the timing sequence of the test pulses.

Figure 1: Current waveform of IEC ESD pulse and timing sequence of test

To help protect your industrial design against the high levels of energy delivered during an ESD event, you can add a TVS diode and pulse-proof series resistor to the bus to help divert and consume the energy. Placing a TVS diode very close to the board connector where the bus lines enter the design ensures that any transient energy coupled onto the bus is minimized at the point of origin. The TVS acts as a clamping circuit to redirect any high-energy pulses to ground, away from the RS-485 transceiver.

Adding series pulse-proof resistors on the A and B bus lines limits the residual clamping current the transceiver sees if the TVS diode clamping voltage is higher than the specified maximum voltage of the transceiver bus pins. These resistors are typically very low in value (~10-20Ω). Select those resistors that can accommodate the appropriate power levels.

Figure 2 shows this concept using the SN65HVD82 RS-485 transceiver. 

Figure 2: SN65HVD82 RS-485 transient protection overview

Table 2 shows the achievable performance of the SN65HVD82 RS-485 transceiver with the added external components.

Protection scheme

IEC ESD (kV)

IEC EFT (kV)

IEC surge (kV)

SN65HVD82

TVS

±30 contact

±30 air

±4

±1

SN65HVD3082E

TVS

±14 contact

±30 air

±4

±1

Table 2: Summary of test results

For more information on IEC protection schemes, please see the RS-485 IEC ESD TI Designs reference design. Leave a comment if you’d like to hear more about anything discussed in this post or if there’s an interface topic you’d like to see in the future.

Additional resources