Want to optimize and improve efficiency of an automated factory setup, increase overall performance in a data-acquisition system, or efficiently detect and correct faults to reduce downtime? If the answer is yes to any or all of the above, you may want to consider enabling clock synchronization with a network synchronizer.
What is clock synchronization?
Ethernet traditionally connected wired local area networks in telecommunications systems; of late, it has become the de facto standard for connecting subsystems in industrial and automotive applications. A reference clock is required for an Ethernet link to operate and is usually generated from a free-running clock source. Clock synchronization is the ability to generate clocks in a subsystem that are traceable to a single master clock in the overall system.
Clock synchronization is useful for many end applications. For example:
Ethernet is a popular serial communication standard due to its cost-effectiveness and ability to support links as low as 10 Mbps or as high as 400 Gbps. Since the Ethernet standard doesn’t natively support synchronization, there are multiple ways to enable synchronization via Ethernet links. There are two aspects of synchronization:
An Ethernet link is established by embedding a clock into the serialized data stream on the transmit section and then recovering the embedded clock before deserializing the data stream on the receive section. In synchronous Ethernet, it is important for designers to choose a clocking device that generates the reference clock for the subsystem. If the recovered clock from the receive Ethernet physical layer (PHY) exhibits poor jitter performance, phase-locked loops (PLLs) with external voltage-controlled crystal oscillators (VCXOs) can clean the excess jitter and present a clean clock to the transmit Ethernet PHY and other parts of the system. Figure 1 shows such a setup, with a Gigabit Ethernet link between the different nodes.
Figure 1: Frequency synchronization using a VCXO-based jitter cleaner
The main challenges of such a setup are:
The LMK05318 network synchronizer clock is an ultra-high-performance clock generator and jitter cleaner that can address the challenges I described above and still exceed the stringent requirements of telecom and industrial applications. The device features TI’s proprietary bulk acoustic wave (BAW) resonator as a voltage-controlled oscillator (VCO). The BAW resonator is a high-quality-factor (high-Q) resonator that replaces the inductor-capacitor oscillator commonly found in network synchronizer integrated circuits. It is a thin-film resonator similar to a quartz crystal, sandwiched between metal films and other layers to confine the mechanical energy. The result is a high-Q, ultra-low-noise resonator that can achieve ultra-low jitter performance.
Figure 2 shows the basic structure of the LMK05318. Using the ability to set a low loop bandwidth either on the digital phase-locked loop (DPLL) or the all-digital PLL (APLL) with the BAW VCO, the LMK05318 cleans reference clock jitter and simplifies overall printed circuit board (PCB) design by relying on inexpensive off-the-shelf components around the device.
Figure 2: Basic structure of a BAW resonator
The LMK05318 can act as a jitter cleaner in two configurations:
Figure 3: Frequency synchronization using the LMK05318
Ultra-high-performance clock jitter cleaners and synchronizers from TI like the LMK05318 simplify the clock tree for enabling clock synchronization in real-time Ethernet while reducing the design cycle, PCB real estate and overall system costs.
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