Many analog systems must accommodate very large range of signal amplitudes with excellent fidelity, or low distortion. At the same time, some signal chain components are damaged by signals that are too large. One example is an analog to digital converter (ADC) input. For a high performance ADC like the ADC16DV160 the absolute maximum input voltage on one of the Vin pins is 2.35-V. Because the ADC is quite expensive and repairing damaged equipment is even more costly, it is very important to make sure that this voltage level is not exceeded. This means that the preceding stages must be designed to never exceed this voltage.
Here we’ll discuss how to protect the ADC.
For this example we will continue to use the ADC16DV160. The ADC input common mode voltage is 1.15-V ± 0.05-V. The maximum (linear) input signal is 2.4-Vpp differential. A 2.4-Vpp differential signal is 1.2-Vpp on each input. Under normal operating conditions each pin swings no lower than 1.15-V – 0.05-V-0.6-V = 0.5-V. Likewise the upper swing limit is 1.15-V +0.05-V +0.6-V = 1.8-V. The absolute maximum voltage of 2.35-V is only 0.55-V away from the normal operating range.
For further perspective, the ADC16DV160 has an SFDR, or spurious free dynamic range, of 98dB with an input tone of -1DBFS. In order to preserve this linearity, the ADC driver needs to have a P1dB point of 18dBm or higher. With a 200 Ohm input load condition and 6dB matching loss, the ADC driver is capable of about 5-Vpp at the ADC input. That means that the ADC driver is capable of producing a positive swing of 2.45-V, which is over the ADC absolute maximum voltage and creates the risk of damage to the ADC.
One solution to this dilemma is to use an amplifier with an output clamp such as the LMH6553 because it has an output clamp with 40m-V accuracy and 600ps recovery time. The LMH6553 output clamp is set to 2.1-V and still easily passes a full scale ADC signal. With 40mV of accuracy, it can also clamp well before the absolute maximum voltage of 2.35-V.
Below are a few graphs to help illustrate the input signals to the ADC. The first graph shows a normal input signal, where the ADC is operating in the linear region. One key note is that a differential signal is composed of two opposite phase single ended signals. The graphs below show one of the single ended signals on the actual voltage presented to the ADC pins. The graphs also include the input and output signals which are differential and mathematically centered on the graph even though there is a positive common mode voltage associated with each one.
Normal input signal
Overdrive input: Showing how ADC is protected by clamp action
Analog systems that require high speed, low distortion and voltage clamping can benefit from a clamping amplifier like the LMH6553. By using a clamping amplifier it is possible to protect sensitive and expensive, high performance ADCs.
Clamp your amp and let me know how it works for you! Or, search TI high-speed op amps and find helpful technical resources.
