When both high DC accuracy and high bandwidth are required at the same time, it may be difficult to implement. Depending on the circuit configuration, there are several valid approaches including building a composite amplifier, or implementing a servo loop around a high-speed amplifier.
For an inverting circuit configuration, a DC servo loop using an operational amplifier configured as an integrator is most suited. For a non-inverting circuit, a DC servo loop circuit based on an operational trans-conductance amplifier (OTA) will be the simplest implementation. These two circuits are shown below in figure 1 and 2.
Figure 1: DC servo loop for inverting amplifier configuration
Figure 2: DC servo loop for non-inverting amplifier configuration
Both of these circuits are AC-coupled whether you want to use a decoupling capacitance or not. I represented the circuit here with a decoupling capacitance to emphasize that the equivalent circuit will be AC-coupled.
The servo loop in effect removes the DC voltage and replaces it with the reference voltage (Vref). The accuracy of the system is only limited by the accuracy of the device used in the servo loop and the speed of the loop. In both these circuits, you have to balance the high-pass bandwidth with the response time of the servo amplifier. If the servo amplifier is too fast or if the change in the signal is too slow, the signal will be servo’ed with disastrous consequences on its integrity. The system will also have an initial settling time before accurate measurement can be achieved.
For the integrator based circuit, the servo amplifier will see its output voltage increase in direct correlation to the output of the signal amplifier. The input of the signal amplifier will then be seen at the output as the DC gain is 1-V/V. The low-pass filter formed by R4 and C3 will limit the bandwidth and minimize the noise contribution to the signal amplifier. The servo amplifier will normally be a precision amplifier such as the OPA277 or OPA333.
The DC servo loop for the non-inverting configuration behaves the same to the integrator up to the output of the SOTA (sampling OTA) of the OPA615. The voltage difference between pin 10 and 11 will generate a current output that will charge the Chold capacitor. The resulting voltage is then fed to another OTA. The voltage appearing at the B- input (pin 3) of this OTA is mirrored to the E-input as a voltage and converted into a current with the resistor RE. The current is finally mirrored to the C-output (pin 12) and inserted into the inverting node of the OPA656. Current will keep adding on to this node until the voltage across pin 10 and 11 is nulled.
Now for some added complexity, the SOTA can be used to sample a specific time, during which there is no signal to achieve a certain DC value, in effect shifting the entire signal up or down. In this mode, the circuit will behave like a DC-restore circuit. If the SOTA is always sampling, the DC correction is only achieved by inserting an RC filter on pin 10. This RC filter will have the same effect as the R4, C3 filter of figure 1.
