Maximizing performance with clean and low-noise power using space-grade LDOs

Maximizing performance with clean and low-noise power using space-grade LDOs

As satellites and space exploration evolve, the industry continues adding more onboard computing for real-time processing. As a result, point-of-load power system requirements are also evolving, requiring higher levels of power, performance and increased efficiency coupled with the challenges of smaller board space and the need for high reliability.

Radiation-hardened low-dropout regulators (LDOs) continue to be vital power components of many space-grade subsystems, including field-programmable gate arrays (FPGAs), data converters and analog circuitry. LDOs help ensure a stable, low-noise and low-ripple power supply for components whose performance depends on a clean input.

But with so many LDOs available on the market, how do you choose the right radiation-hardened device for your subsystem?

Minimizing noise

In order to provide a clean, low-noise rail for high-performance clocks, data converters, digital signal processors or analog components, the internal noise generated by an LDO’s circuitry needs to be minimal. Since it is not easy to filter internally generated 1/f noise, look for LDOs with inherent low-noise characteristics. Lower-frequency noise is often the largest and most difficult to filter out. The TPS7H1111-SP offers one of the lowest 1/f noise levels, with a peak around 100 nV/√Hz at 10 Hz. Figure 1 illustrates noise spectral density over frequency.


Figure 1: TI space-grade LDO noise comparison


The power-supply rejection ratio (PSRR) measures how well an LDO can clean up, or reject, incoming noise from other components upstream, such as switching power supplies. For higher-end analog-to-digital converters (ADCs), the input supply noise requirements continue to get tighter to minimize bit errors. It is difficult to have a high PSRR at higher frequencies because it requires a fast response from the control loop. Often, designers need to use external components that filter the noise to reach an effective PSRR, which increases solution size. That’s an obvious issue for space applications, where size and weight tie directly to satellite launch costs.

Additionally, the PSRR is important above this frequency because of the switching harmonics. If you’re looking for a good PSRR, the TPS7H1111-SP LDO offers a significant performance advantage, especially at the higher frequency range, with a PSRR of 70 dB at 1 MHz (see Figure 2).

Figure 2: TI radiation-hardened LDO PSRR comparison

Compared to other radiation-hardened LDOs, the TPS7H1111-SP provides similar or better PSRR performance at lower frequencies, and noticeable improvements at much higher frequencies. This is particularly important as designers continue increasing the switching frequency at which they operate upstream switching regulators (see Figure 3).


Figure 3: Industry-standard radiation-hardened LDO PSRR performance

The improved PSRR performance from the TPS7H1111-SP helps reduce overall solution size and weight by eliminating the need for discrete filters.

Figure 4 shows an example layout with the TPS7H1101A-SP and additional discrete components needed to achieve an acceptable PSRR level. The performance increase from the TPS7H1111-SP provides a better PSRR, and results in a solution size that’s approximately 40% smaller.

Figure 4: Filter size reduction using the TPS7H1111-SP


Other important LDO features

There are other design considerations beyond PSRR and noise that impact satellite performance and efficiency.

Power is a limited resource in space, as there is only a set amount available from the solar panel. An enable feature allows you to specify whether the LDO should be on or off at any given time, contributing to overall savings in a power budget. The enable pin is also important for power-up sequencing, which is increasingly relevant in newer-generation FPGAs.

Operating close to the minimum dropout voltage can further improve power efficiency. An LDO’s dropout voltage is the voltage differential between the input and output voltage, at which point the LDO ceases regulating the output voltage. The smaller the dropout voltage specification, the lower the operating voltage differential, which results in less power and thermal dissipation as well as inherently higher maximum efficiency. The TPS7A4501-SP, TPS7H1101A-SP and TPS7H1111-SP all support fairly small dropout voltages. However, it is crucial to consider load conditions, output capacitance and headroom in order to not limit PSRR performance.

Power isn’t the only design challenge. Newer space-grade FPGAs such as the Xilinx KU060 or Versal XQR VC1902 have strict input-voltage tolerance requirements on each rail to optimize performance. To meet strict accuracy requirements, you must consider accuracy over radiation exposure and end-of-life conditions. The TPS7H1111-SP has ±1.5% accuracy over line, load, temperature and radiation.

Providing a reliable power rail, especially on startup, will help prevent damage to downstream components. A soft-start feature prevents voltages from rising too quickly, which can cause current overshoot or excessive peak inrush current. Soft start also prevents an unacceptable level of voltage droop by preventing overcurrent draw on the upstream supply.

While the TPS7H1111-SP helps improve power density by eliminating the need for discrete filters, there are other ways to reduce solution size, including limiting the number of external components to the LDO and its actual footprint. TI’s TPS7A4501-SP is one of the industry’s smallest radiation-hardened LDOs in package size, layout and solution size. Alternatively, new releases in our Space Enhanced Plastic (-SEP) for low Earth orbit missions help improve power density by reducing footprint size anywhere from 30% to 50%. The TPS73801-SEP and TPS7H1111-SEP are recent examples of how these plastic radiation-tolerant solutions continue to improve size, weight and power.


Powering noise-sensitive rails in space is a dynamic challenge, with trade-offs between efficiency, reliability, performance, size and weight. Not all applications need a high-performance LDO. If you’re designing a low-performance analog circuit or working with an older FPGA where tolerance requirements are not so stringent, you can still have a small-sized, low-cost solution while retaining an acceptable level of capability.

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