Designers are constantly challenged with increasing the performance of their processors in order to keep up with the complexity and features they want to add in their systems. That challenge of increasing performance can also cause a higher price tag for the processor. TI’s C2000™ microcontrollers (MCUs) creatively solve this problem by not only offering a cost-optimized solution, but by also adding hardware accelerators which are architected to decrease the latency of control loop and math calculations while increasing the bandwidth of the processor.
C2000 MCUs feature four different accelerators, each with specific purpose to help designers boost the performance of their digital control design. These accelerators are:
- Floating-point unit (FPU) – Enables floating-point math calculations making it easier to develop code compared to fixed-point math calculations
- Trigonometric math unit (TMU) – Accelerates trigonometric math operations commonly used in motor control algorithms which would otherwise be cycle-intensive
- Viterbi, complex math and CRC unit (VCU) – Improves the performance of communication-based algorithms and complex math functions which are common in power line communication (PLC) applications
- Real-time control co-processor (CLA) – Increases the bandwidth of the main C28x CPU by offloading math-intensive calculations and control loops to the independent CLA co-processor
These accelerators bring distinct boosts to industrial control applications, for example, using the FPU over a traditional fixed-point MCU can result in a 2.5 times performance improvement in math calculations. The TMU accelerator greatly improves the performance of control algorithms such as a park and inverse park transform, space vector generation, and FFT magnitude and phase calculations. For example, designers implementing a park transform can expect to see about a 6 times the improvement over the CPU without the TMU. The VCU also reduces the execution time of functions used in common PLC standards such as PRIME and G3 and also complex math and CRC calculations. For instance, a Viterbi butterfly algorithm performs 7 times faster when executed on the VCU instead of being implemented in-software on the C28x CPU. The CLA can effectively double the overall system throughput of the MCU since it is a completely independent 32-bit floating-point co-processor that runs concurrently with the CPU. It is optimized for time-critical math intensive calculations, and it dramatically minimizes latency by having direct access to the control peripherals.
C2000 MCUs offer various combinations of accelerators; however, the flagship Delfino™ F2837xD and F2837xS MCUs feature all four accelerators. Check out the latest Delfino F28377S LaunchPad which is a low cost development platform that introduces you to all four accelerators for less than $30.
Piccolo™ MCUs |
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CPU Speed |
FPU |
TMU |
VCU |
CLA |
60 MHz |
|
|
|
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|
60 MHz |
X |
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|
X |
|
60 MHz |
X |
|
|
X |
|
90 MHz |
X |
|
X |
X |
|
120 MHz |
X |
X |
|
X |
Delfino MCUs |
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|
CPU Speed |
FPU |
TMU |
VCU |
CLA |
150 MHz |
X |
|
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|
|
300 MHz |
X |
|
|
|
|
200 MHz |
X |
X |
X |
X |
|
200 MHz (x2) |
X |
X |
X |
X |
Top Comments
using the FPU over a traditional fixed-point MCU can result in a 2.5 times performance improvement in math calculations.
Hi Team,
Do we have an actual comparative case? to verify this.