One of the most discussed topics during the IEEE802.3bt task force meetings is the maintain power signature (MPS) of PDs. In fact, other than things directly related to the move from 2-pair power to 4-pair power, the MPS signal level and timing is the only specification change that has been proposed. As I went back to review the IEEE Std 802.3-2012 (the current standard that incorporates the 802.3at PoE standard) to study the differences between the new proposals and the current standard, I was reminded just how confusing the standard could be. As such, I thought I would use the current MPS specification as a case study to explain what the standard means to the people that are implementing it.
The MPS requirements for a PSE (I will only be discussing DC MPS in this blog post) are described in section 18.104.22.168.2 (Download the standard from IEEE here). The standard states:
“A PSE shall consider the DC MPS component to be present if IPort is greater than or equal to IHold max for a minimum of TMPS. A PSE shall consider the DC MPS component to be absent if IPort is less than or equal to IHold min. A PSE may consider the DC MPS component to be either present or absent if IPort is in the range IHold.
Power shall be removed from the PI when DC MPS has been absent for a duration greater than TMPDO.
The specification for TMPS in Table 33–11 applies only to the DC MPS component. The PSE shall not remove power from the port when IPort is greater than or equal to IHold max continuously for at least TMPS every TMPS + TMPDO, as defined in Table 33–11. This allows a PD to minimize its power consumption.”
First, to make it a little more clear, lets define some of the variables that the text references: IPort is simply the current at the PSE power interface (PI), IHold has a minimum value of 5 mA and a maximum value of 10 mA, TMPS has a minimum value of 60 ms, and TMPDO has a range of 300 ms to 400 ms.
What does this section actually force a PSE to implement? In the end, all of this text only means two things:
There is also a great deal of undefined behavior hidden in the text above. Most obviously, any time the port current is between 5 mA and 10 mA, the PSE can remove or not remove power (note that the timings still apply). Another behavior hidden in the text is that the as long as the port current goes above 10 mA for any infinitely short period of time during the TMPDO period, the PSE can choose not to remove power. The lack of a true minimum for the MPS signal leads to each PSE vendor setting their threshold differently. Some vendors set their MPS timing very low with the belief that disconnecting something that should still be powered is worse than not removing power to something that shouldn’t. Other vendors set their MPS timing higher in order to make their system more robust to noise.
Now, how does this affect the PD specification? Luckily, the PD specification is much more straight forward. The PD MPS requirements, spelled out in section 33.3.8 of the IEEE Std 802.3-2012, simply state that the PD must draw at least 10 mA for 75 ms followed by an optional period of lower current up to 250 ms long to guarantee that it keeps receiving power from the PSE. The reason for the substantial difference in timing is because the PSE and PD specifications are measured at each device’s PI. The margin accounts for up to a 100 meter cable between them.
Did this help give you a sense of how to interpret the IEEE PoE specification? Have you noticed different MPS timings when comparing PSEs? Do you have a preference for shorter or longer MPS timings? Comment below and let me know what you think.
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