Sushi is wonderful. It packs a fresh, satisfying flavor into a small package that melds the subtleties of just a few ingredients to make something special. It reminds me of the ideal power supply: a small, efficient collection of stages that produces the power to drive your amazing product.
In this analogy, the power factor correction (PFC) stage is like the rice in good sushi. Just as rice creates a base that enables other ingredients to shine, the PFC stage makes it possible for the other components to deliver power to the end product. The responsiveness of the metal-oxide semiconductor field-effect transistor (MOSFET) to the changes in output signal from the PFC controller is crucial to the PFC stage. For the timing to be correct, the gate-drive circuit must switch the FET only when it’s supposed to.
The application report “Fundamentals of MOSFET and IGBT Gate Driver Circuits” details a number of methods to effectively drive MOSFET gates, including the popular bipolar totem-pole pictured in Figure 1.
Figure 1: BJT Totem Pole Gate Drive Circuit
You can use the configuration in Figure 1 to effectively drive 3A to 6A to the MOSFET gate, but there are a couple of drawbacks that a gate driver integrated circuit (IC) can rectify related to board space, system design complexity, and noise immunity.
Board space and system design complexity
One common place where you need a gate drive circuit is the PFC stage. In the example layout of a PFC solution with a level-shift, shown in Figure 2, the design requires 17 discrete components and 0.84in2 (or 542 mm2) of printed circuit board (PCB) space.
Figure 2: PFC solution with only discrete components
In contrast, the same design using a gate-driver IC (Figure 3) such as the UCC27517 to drive the MOSFET gate requires only five total components and occupies only 0.33in2 (or 212 mm2) of PCB space.
Figure 3: PFC solution using the UCC27517 MOSFET gate driver
In addition to the decrease in board space, the decrease in discrete components enables you to spend less time and effort to ensure proper switch timing.
In a perfect world, the gate-drive output of your PFC controller would be a perfect square wave. But, due to the parasitic components present in every PFC design, there is almost always noise introduced upon switching, causing the generated wave to look like Figure 4.
Figure 4: Example PFC controller output waveform
Notice the oscillation in the signal when the logic level switches, which can be much larger than what you see in Figure 4. In order to design the most efficient PFC circuit possible, you want your MOSFET to only switch when you want it to so as to ultimately output the smoothest possible sinusoidal current waveform. Therefore, it is important for your gate-drive circuit to have a large enough input hysteresis (the difference between the input signal high threshold and low threshold) so that the MOSFET does not switch when this noise occurs.
In the discrete solution, current will be driven to the MOSFET gate if the input voltage is greater than 0.7 V, meaning that the hysteresis is very small. In contrast, integrated driver ICs will not switch output logic levels unless the input voltage reaches a value significantly below or above the high and low logic input levels respectively, thus protecting your system from the negative effects of input noise.
Becoming a head sushi chef (or itamae) takes years of training, and although it may not seem like the most important part of the craft, the ability to make rice that has the ideal form and consistency to create quality sushi is vital to attaining this status. Much like the time and effort that itamaes put into rice, gate-driver IC designers spend many hours making a quality device that can be used for driving a MOSFET gate. With that in mind, consider the performance advantages that gate-driver ICs have over their discrete counterparts when choosing the design of your solution. For more information on how to choose a gate driver for your design, check out the TI Training “Know Your Gate Driver”-video series.
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