In multi-rail systems system designers often have to make the choice of where to tap into for the input rail for the buck controllers. Often it is from 12V or 24V rails, however in some cases it’s from 5V or 3.3V rails. I will be discussing the need to supplying external bias and its benefits in the first part of this 3 part series.
Well, it comes down to the metal-oxide semiconductor field-effect transistor (MOSFET) curves and operating the MOSFETs in their sweet spots. It also depends on the input voltage. Most controllers are designed for use in a 5V or 12V rail, yet in many cases system designers use the same controllers in lower voltage rails.
If you look at the data sheets of those controllers, the VIN range checks out OK, but are you really getting the best performance or highest efficiency possible when operating at 3.3V?
Let’s use TI’s LM27403 as an example. Figure 1 shows the applicable info from the data sheet.
Figure 1: LM27403 VIN range
The minimum VIN is 3V, so it passes the sanity check for use with a 3.3V rail. Now, let’s look at the block diagram for the LM27403, shown in Figure 2.
Figure 2: LM27403 block diagram
VDD in Figure 2 powers both the low- and high-side drivers. The supply for the low-side driver is VDD and the supply for the high-side driver is CBOOT, also known as VDD-Dboot. This means that the low-side FET will see 3.3V for the gate drive and the high-side FET will see 3.3V minus the boot diode drop.
You’ll usually want to use controllers when your output-current needs are higher than 5A. Take a 15A application; Table 1 lists a few random FET choices.
Table 1: Some FET choices for a 15A design
Referring to Table 1 and Figure 3 you can see that the ID max and Rdson spec columns in the data sheet can be misleading when it comes to operating at 3.3V. Factoring in a 10% tolerance, examine the FET curves (in Figure 3) for 3V and the drain current in the Id at Vgs=3V column in Table 1. This is the significant parameter that tells you whether a FET can natively support operation at VIN = 3.3V. For example, the NTMFS4834N will not support a 15A application even though it has a low Rdson number (see the ID capability at Vgs = 3V in Figure 3). This same FET would be OK if you were supplying 5V to the VDD pin of the LM27403. But using FETs that are not designed for a 3.3V application will affect three things:
Good choice for a 3.3V input voltage/15A design Bad choice for a 3.3V input voltage/15A design
Figure 3: FET curves showing ID versus VDS for different gate voltages
Table 1 indicates that all of the FETs would be fine to use at Vgs = 5V.
Talking about MOSFET data sheets, the CSD17304Q3 and CSD17309Q3 data sheets show my favorite format depicting curves down to lower Vgs levels. Figure 4 shows the curves down to Vgs levels of 2.5V. Kudos to the applications team that did this.
Figure 4: FET curve from the CSD17309Q3 data sheet
How do you accomplish that practically for a 3.3V rail? This leads me to the question I asked at the beginning of this post; when to use an external bias for controllers.
In some cases external bias is used as an efficiency improvement measure. In other cases external bias makes it practical for the FET to support the current.
Figures 5 and 6 shows the efficiency improvements for different configurations of VDD with different FETs.
How much current should the bias regulator be capable of supplying? It should be capable of providing the non-switching quiescent current plus the average gate-drive currents (Ibias). You can calculate this using Equation 1:
(Qg control FET + Qg synchronous FET) * Fsw (1)
Using the CSD87350Q5D as an example, Ibias = 30nc * 250kHz = 7.5mA.
Figure 5: Efficiency curves for the LM27403 and BSC032NE2LS/BSC010NE2LS, with internal and external bias
Figure 6: Efficiency curves for the LM27403 and NTMFS4834, with internal and external bias
Figure 7 shows the impact of DC bias on the switching waveform, with dc bias the rise times are fast.
Figure 7: Switching waveforms with and without DC bias
So as you can see, you have to pay careful attention to FET selection in controller designs that run off of a 3.3V rail. By pairing the right FET, you can get a trouble-free design performing at its best; by using a device that flexibly applies external bias, you can optimize your design for cost and highest efficiency.
In the next installment of this series, I’ll discuss these two topics:
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