Dealing with Efficiency, Thermal Performance, and Power Density Challenges? Here's PowerStack!

System power design is becoming more complex, and the trends continue to be cost, reliability, efficiency, ease-of-use, and power density (output power per unit of volume).

More often than not system designers leave power design as the very last stage of their designs only to realize there's not much room after the CPU/DSP, memory, chipset, host processor/FPGA and other system component areas have been fixed.

On top of this the efficiency, from light load all the way to full load, has to be as high as possible, to conserve power, and the power solution has to perform exceptionally well thermally especially in systems that may be exposed to increasing ambient temperatures up to +85 degrees Celsius, or perhaps higher.

Nowadays Embedded Computers for example, pack a lot of punch in a small form factor, like the COM Express module, where CPU core currents can exceed 90 Amperes!

Texas Instruments has developed a unique and proprietary MOSFET packaging technology called PowerStack that is helping improve efficiency, thermal performance, ease-of-use, power density and reliability.

Power Stack is a vertical stacking technology of the high-side NexFET and low-side NexFET through copper clips onto the IC leadframe. The package is encapsulated so one would see a lot of plastic looking at the IC but inside the PowerStack package there are two copper clips that act as heatsinks: one connected from VIN (the power bus input) to the high-side NexFET Drain, and the other connected from the high-side NexFET Source to the Switching Node and to the low-side NexFET Drain. All the connections between VIN and the IC Ground (copper pad on the bottom of the package) are made with solder, so the metal-on-metal connection helps tremendously with power delivery and thermal dissipation in the PowerStack package. Because the connections are  metal-on-metal (copper clips and solder), and not conductive thermal epoxy (thermal glue), the thermal impedance junction-to-case is much lower, and the reliability is much higher vs. packages that use thermal epoxy. Thermal epoxy is notorious for contracting and expanding as the ambient and PCB temperature changes, which can lead to die delamination, and thus potentially catastrophic failure.

Power Stack uses metal-on-metal as mentioned;  there are no wire bonds between the high-side and low-side NexFET. Wire Bonds introduce further inductance, which causes additional power loss, and lower efficiency, thus worse thermal performance. Consequently, since the PowerStack package inductance is lower, a dc/dc converter using PowerStack, or a discrete PowerBlock (TI's version of a Dual MOSFET - Half Bridge) can be switched at 2X the switching frequency vs. discrete MOSFET designs with no trade-off in efficiency. As a matter of fact, the efficiency is higher, and because the switching frequency has been doubled, the power density is also a lot higher. This is a WIN-WIN scenario!

Last but not least: cost and ease-of-use. When comparing solution costs, the prudent designer always compares the total solution cost. PowerStack enables a much smaller PCB area, thus may enable a smaller form-factor design, thus lower PCB costs, and because it can be switched at very high switching frequencies, as high as 1.5MHz, it enables a smaller, and lower-cost output filter.

The top layer PCB design and thermal management are also a lot easier: Power Stack only has one single, solid, large copper pad on the bottom of the package, which is the Ground connection. Competitors' Dual FETs use as many as three pads on the bottom of the package (typically one for VIN, one for the Switching Node, and one for the Ground), thus making top PCB layer layout more complex since three (3) separate PCB islands have to be used vs. only one (1) with a PowerStack package.

The PowerStack Ground pad at the bottom of the package can also be easily connected to the PCB internal Ground layers via vias, enabling excellent thermal management, away from the PCB top layer, while discrete high-side and low-side NexFETs have to dissipate some of the heat on the top PCB layer where the Switching Node island resides.

TI PowerBlocks using PowerStack have enabled ~92% efficiency in Servers powering high-current microprocessors at 12VIN, 1.2VOUT, 350KHz Fsw, and 135 Amperes of Output Current (25 degrees Ambient Temperature)!

The CSD87350Q5D 40A PowerBlock http://www.ti.com/lit/ds/symlink/csd87350q5d.pdf uses Power Stack in a standard 5x6 QFN package. It was voted the 2010 Power Product Of the Year by Electronic Products, and ECN technical publications. To view the power density and thermal performance benefits please refer to the TPS53219 PWM Controller EVM user's guide; this design uses the 25V CSD86350Q5D PowerBlock http://www.ti.com/lit/ug/slvu431/slvu431.pdf

There are also 3x3 QFN versions such as the CSD87330Q3D or CSD87331Q3D http://www.ti.com/product/csd87330q3d

Texas Instruments has several High-Current Step-Down DC/DC Converters that use PowerStack. The TPS53355/53 are pin-to-pin 30A/20A synchronous step-down dc/dc converters http://www.ti.com/tool/tps53355evm-743 using Power Stack in a 5x6 QFN. They employ TI's proprietary DCAP control mode, and Eco Mode technologies for no loop compensation network, the lowest bulk output capacitor count, and high efficiency from light load (mAmperes) to full load (up to 30A Amperes).

For designers that need step-down dc/dc converters using PowerStack but with a more conventional control topology, the TPS56221/121 25A/15A pin-to-pin synchronous step-down dc/dc convertershttp://www.ti.com/tool/tps56221evm-579  are available in 5x6 QFN. They employ Voltage Mode control, and are part of TI's SWIFT family of dc/dc converters.

Using PowerStack enables high power density, high efficiency, excellent thermal performance, ease of layout, and use, and high reliability.

This is one case where you can have your cake, and eat it too!

Anonymous