Get more out of your power supply with port power management

Other Parts Discussed in Post: TPS23881, MSP430F5234

With the publication of the new Institute of Electrical and Electronics Engineers 802.3bt standard, the power range of Power over Ethernet (PoE) loads continues to expand. If you are designing systems that provide PoE, this presents a challenge. You may need to provide 5 W of power to a low-end Internet Protocol camera or 70 W to a high-end wireless access point (WAP). An enterprise switch with 48 ports that can simultaneously support 90 W on all ports would require a 4.3-kW supply.

You probably want to enable the full functionality of the high-end WAP, but do you really want to pay for the giant power supply? Knowing the typical use case of your system, you can choose a smaller power supply that would be sufficient in most situations. But, how do you prevent the supply from overloading in the rare event that all loads draw full power?

Port power management (PPM) algorithms can come to your rescue. When a new device is plugged in, the system will only turn the device on if there is enough remaining power. A system that supports priority and exceeds its power budget will actually shut down a lower-priority load when a higher-priority load is plugged in.

At a high level, PPM is a simple concept, but it can have multiple flavors, and its implementation can be tricky. Typically, there are multiple power sourcing equipment (PSE) devices, thus requiring a central microcontroller (MCU) to manage the system. Also, the system could have slots for multiple power supplies, which can get plugged in or unplugged during operation.

TI’s FirmPSE ecosystem can give you a huge head start in implementing PPM in your end equipment by removing the burden of writing low-level code to control the PSEs. Figure 1 shows the evaluation board of TI’s FirmPSE, which is implemented using an MSP430™ MCU and TPS23881 PSE. TI provides a binary image that you can load directly into the MSP430F5234. You will need to write code that interfaces between the host central processing unit (CPU) and the MSP430F5234 to configure the system and monitor the port status.

 Evaluation board of TI’s FirmPSE ecosystem

Figure 1: Evaluation board of TI’s FirmPSE ecosystem

TI’s ecosystem features:

  • Orderable TI designs with twenty-four 90-W PoE ports.
  • A user’s guide.
  • A binary image that can be loaded directly to the MCU.
  • A host interface document defining the interface between the MSP430F5234 and host CPU.
  • A graphical user interface to configure the binary image and to evaluate monitor port status’s of the FirmPSE system.

To learn more about PPM and ways to reduce your power supply consider watching our FirmPSE system firmware GUI offline mode or online mode training videos.