Take Charge of ESD Safety


Welcome to our three-part series on Electrostatic Discharge (ESD) Testing!

I’m sure we have all lost at least one beloved board to the engineer’s bête noire – ESD. Electronic components and boards damaged due to unintentional ESD strikes result in damages worth many millions of dollars every year. As engineers we should be taking every precaution to prevent or minimize damage due to ESD events. Creating a robust ESD design may seem like a tall order considering there are so many variables in our environment today. Yet there are many simple things we can do to minimize the risk. Before we delve into the “dos and don’ts” for ESD safety, let’s see if we can demystify the terminology surrounding ESD testing.

A static charge is defined as an unbalanced electrical charge at rest. This is created by two insulators coming in contact with each other wherein one gains electrons and the other loses electrons. If this accumulated static charge moves from one surface to another it can result in very large, damaging voltages. For example walking across a carpet can produce a static charge in the range of 2-4kV. Metal oxide semiconductor (MOS) devices are especially at risk because their insulating layer can be affected even by discharges as low as 50V.

When designing a board (PCB) for ESD robustness there are a few things to keep in mind:

(1)The ESD rating of each component on the BOM, sometimes referred to as device-level ESD

(2) Board-level, PCB-level or system-level ESD

(3) Environment where the board will be used

Device or component level ratings are usually defined by the following commonly used models:

(1) Human Body Model (HBM): this rating models the ESD strike when it occurs due to a human touching a component. This is also the most commonly used model.

(2) Charge Device Model (CDM): This model simulates ESD strikes in manufacturing and production processes for example with pick and place machines or assembly lines.

(3) Machine Model (MM): This rating simulates a machine discharging to ground via the component or device under test (DUT).

Component-level ESD ratings are mainly useful in determining safety standards during production handling of a device, manufacturing, delivery etc. These ratings are defined as industry standard values and the component manufacturer’s datasheet may contain a listing of the voltages for each model for that specific component.

Screenshot of device-level ESD rating from the SM74611 Smart Bypass Diode datasheet

How safe your design is ‘in-application’ can only be determined by running system-level tests i.e. on the application-PCB as a whole. Device and System-level ESD tests can differ in voltage levels (peak), transient characteristics, coupling methods and also in how the tests are conducted (air or contact discharge). The most commonly used standard for system-level ESD tests is the Electromagnetic Compatibility- IEC61000 standard. This standard has many different sub-classifications of which the IEC61000-4-2 is the most commonly used for consumer electronics such as mobile phones, tablets etc. Testing to see if your application can pass this standard will involve building a prototype and submitting it to a test house that specializes in IEC compliance or testing it yourself in-house using a standard-compliant test bench and procedures.

The third aspect of designing for ESD robustness involves the environment where the application will be deployed. Some examples of environment-based effects:

(1) Will the application be fully enclosed in a non-conducting enclosure that cuts off all access? If yes, then the likelihood of likelihood of a direct contact strike to pin is very low since this system is fully enclosed by an insulator.

(2) Consumer devices such as phones or laptops typically have a very high probability of exposure to strikes given that these devices function based on user input. In a phone ESD could couple though the buttons or through an auxiliary cable that is attached to the phone.

(3) In many devices where a USB port is provided, this is a typical ‘ESD strike hot spot’ since users plug/unplug cables multiple times a day.

The figure below shows a few different enclosure types and potential paths for an ESD strike to travel.

The next post in this series will highlight top three signs to look for when investigating an ESD failure.

While I attempt to chip away at the vast topic of ESD testing I do recommend catching up on these topics in-depth by reading the application report System-Level ESD Considerations.

Stay tuned and stay charged!