ARM® cores are becoming more popular as developers realize the advantages of the large and open ARM ecosystem, as well as the inherent advantages of ARM cores themselves- power efficient processing, a powerful instruction set, and scalable solutions. However, as developers look at the diverse array of ARM SoCs available on the market it is worthwhile to keep in mind that an equivalent ARM core doesn’t mean two SoCs are equal. Key features such as memory bandwidth, power consumption, and reliability can all vary greatly depending on the underlying SoC architecture.
TI’s multicore ARM SoCs based on the KeyStone™ II architecture, including AM5K2E04, AM5K2E02, and 66AK2E05 (which has an additional C66x DSP core), are ready to meet the demanding challenges of today’s industrial, defense and avionics markets. While TI uses standard ARM Cortex®-A15s in these devices, the KeyStone II architecture expands the memory bus to achieve near double the throughput to each A15 core. This enables developers to move more data in and out of the cores every cycle, speeding up critical algorithms. Another way the KeyStone II architecture enables ARM cores to work at a higher level is through the TeraNet, the non-blocking hierarchical switch fabric with over 2Tbps capacity. By using a hierarchical fabric as opposed to an any-to-any switch fabric, the KeyStone II architecture saves power while allowing full connectivity. Additional power management features allow developers to shut off unused cores and subsystems, and bring them back online quickly when workloads increase- saving developers even more power.
Learn more about the KeyStone architecture advantages in the white paper "Differentiating AM5K2E02 and AM5K2E04 SoCs from Alternate ARM Cortex-A15 devices".
The performance and power efficiency of the AM5K2Ex processors is critical in industrial and defense end equipment where every watt counts- either as more heat in a fanless enclosure, or as additional weight in the form of extra fuel for a plane to carry. In addition to power and performance requirements, these markets have extensive reliability needs. The K2E family meets these needs with ECC on L2 and shared memory, and L1D for the ARM core (L1P has parity), which results in a low soft error rate (SER). Additionally, the devices achieve 100K power on hours at a junction temperature of 105C, and are rated for -40-100C case temperatures. All of these facts contribute to the ability of these devices to withstand harsh environments for long periods of time without error- something that’s critical when you need your equipment to last many years without service on a factory floor, or when your equipment is literally mission critical.
The K2E family of processors also supports security features, including a secure boot method where TI never has to access customers’ secure keys, and has a wide variety of high-throughput interfaces including 8 lanes of 1Gb Ethernet with integrated, 2 lanes of 10Gb Ethernet with integrated switch, 4 lanes of PCIe gen 2, and TI’s Hyperlink interface which allows 50Gbps connection to other TI KeyStone SoCs or, with IP from our third party partner Integretek, FPGAs. With the support of mainline Linux as well as upcoming support of commercial RTOSes such as Wind River VxWorks and Green Hills INTEGRITY, the K2E family of processors is ready for development in industrial and defense end equipment.
There are many advantages that come from using standard ARM cores, and the KeyStone II architecture from TI makes those advantages shine in a power efficient, reliable, integrated SoC with the AM5K2Ex and 66AK2Ex.