# pcieErrIrqStatusReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the ERR Interrupt Enabled Status Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | errAer
| [rw] ECRC error status
uint8_t | errAxi
| [rw] AXI tag lookup fatal error status
uint8_t | errCorr
| [rw] correctable error status
uint8_t | errNonFatal
| [rw] nonfatal error status
uint8_t | errFatal
| [rw] fatal error status
uint8_t | errSys
| [rw] system error (fatal, nonfatal, correctable error) status

## Detailed Description

Specification of the ERR Interrupt Enabled Status Register.

## Field Documentation

uint8_t pcieErrIrqStatusReg_s::errAer

[rw] ECRC error status

Field size: 1 bit

uint8_t pcieErrIrqStatusReg_s::errAxi

[rw] AXI tag lookup fatal error status

Field size: 1 bit

uint8_t pcieErrIrqStatusReg_s::errCorr

[rw] correctable error status

Field size: 1 bit

uint8_t pcieErrIrqStatusReg_s::errFatal

[rw] fatal error status

Field size: 1 bit

uint8_t pcieErrIrqStatusReg_s::errNonFatal

[rw] nonfatal error status

Field size: 1 bit

uint8_t pcieErrIrqStatusReg_s::errSys

[rw] system error (fatal, nonfatal, correctable error) status

Field size: 1 bit

uint32_t pcieErrIrqStatusReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated