# BWMNGMT Data Structures
[BWMNGMT]

## Data Structures

struct | CSL_BWMNGMT_CPUARB_SETUP
| CSL_BWMNGMT_CPUARB_SETUP has all the fields required to configure the CPU Arbitration Control Register of BWMNGMT for any given memory control block (L1D/L2/EMC). More...
struct | CSL_BWMNGMT_MDMAPRI_SETUP
| CSL_BWMNGMT_MDMAPRI_SETUP has all the fields required to configure Master DMA (MDMA) Arbitration Control Register of BWMNGMT for L2/UMC memory control block. More...

## Defines

#define | hCgem ((CSL_CgemRegs*)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS)

## Define Documentation

#define hCgem ((CSL_CgemRegs*)CSL_CGEM0_5_REG_BASE_ADDRESS_REGS)

Handle to access Bandwidth Management registers accessible through config bus.

Copyright 2012, Texas Instruments Incorporated