# pcieErrIrqEnableClrReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the ERR Interrupt Enable Clear Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | errAer
| [rw] set to disable the ECRC error interrupt
uint8_t | errAxi
| [rw] set to disable the AXI tag lookup fatal error interrupt
uint8_t | errCorr
| [rw] set to disable the correctable error interrupt
uint8_t | errNonFatal
| [rw] set to disable the nonfatal error interrupt
uint8_t | errFatal
| [rw] set to disable the fatal error interrupt
uint8_t | errSys
| [rw] set to disable the system error (fatal, nonfatal, correctable error) interrupt

## Detailed Description

Specification of the ERR Interrupt Enable Clear Register.

## Field Documentation

uint8_t pcieErrIrqEnableClrReg_s::errAer

[rw] set to disable the ECRC error interrupt

Field size: 1 bit

uint8_t pcieErrIrqEnableClrReg_s::errAxi

[rw] set to disable the AXI tag lookup fatal error interrupt

Field size: 1 bit

uint8_t pcieErrIrqEnableClrReg_s::errCorr

[rw] set to disable the correctable error interrupt

Field size: 1 bit

uint8_t pcieErrIrqEnableClrReg_s::errFatal

[rw] set to disable the fatal error interrupt

Field size: 1 bit

uint8_t pcieErrIrqEnableClrReg_s::errNonFatal

[rw] set to disable the nonfatal error interrupt

Field size: 1 bit

uint8_t pcieErrIrqEnableClrReg_s::errSys

[rw] set to disable the system error (fatal, nonfatal, correctable error) interrupt

Field size: 1 bit

uint32_t pcieErrIrqEnableClrReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated