# pcieRootErrCmdReg_s Struct Reference
[PCIE LLD Extended Capabilities Register Definitions]

Specification of the Root Error Command register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | ferrRptEn
| [rw] Fatal Error Reporting Enable.
uint8_t | nferrRptEn
| [rw] Nonfatal Error Reporting Enable.
uint8_t | cerrRptEn
| [rw] Correctable Error Reporting Enable.

## Detailed Description

Specification of the Root Error Command register.

This register may be used for both endpoint and root complex modes.

## Field Documentation

uint8_t pcieRootErrCmdReg_s::cerrRptEn

[rw] Correctable Error Reporting Enable.

Field size: 1 bit

uint8_t pcieRootErrCmdReg_s::ferrRptEn

[rw] Fatal Error Reporting Enable.

Field size: 1 bit

uint8_t pcieRootErrCmdReg_s::nferrRptEn

[rw] Nonfatal Error Reporting Enable.

Field size: 1 bit

uint32_t pcieRootErrCmdReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated