# hyplnkECCErrorsReg_s Struct Reference
[HYPLNK LLD Register Definitions]

Specification of the ECC Error Counters Register. More...

`#include <hyplnk.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint16_t | sglErrCor
| [rw] Corrected Single Error Counter
uint8_t | dblErrDet
| [rw] Detected Double Error Counter

## Detailed Description

Specification of the ECC Error Counters Register.

The ECC Error Counter register counts the number of correctable single bit errors detected by the receive PLS as well as the number of detectable double bit errors. This value can be used to determine the integrity of the SerDes Rx signal. Writing to this register clears the current counts to zero.

## Field Documentation

uint8_t hyplnkECCErrorsReg_s::dblErrDet

[rw] Detected Double Error Counter

Field size: 8 bits

Counter is incremented when a detectable two bit error is detected by the Rx PLS layer. This indicates that the receive channel signal is marginal. Writing any value to this register will clear this counter.

uint16_t hyplnkECCErrorsReg_s::sglErrCor

[rw] Corrected Single Error Counter

Field size: 16 bits

Counter is incremented when a correctable error is detected by the Rx PLS layer. Writing any value to this register will clear this counter.

The documentation for this struct was generated from the following file:

- hyplnk.h

Copyright 2012, Texas Instruments Incorporated