/*                                                                          */
/* File Name   : mbdr_dsp_sdc_sync_with_cpu.h                                        */
/*                                                                          */
/* Written By  : 79556                                                      */
/*                                                                          */
/* versions    :                                                            */
/*+--------+-----------+----------------------------------------------------+*/
/*|Version | Date      | Change content                                     |*/
/*+--------+-----------+----------------------------------------------------+*/
/*| ??     |15/Jul/2007| creation                                           |*/
/*+--------+-----------+----------------------------------------------------+*/
/*| 0.01.13|14/Dec/2007|- common main init                                 |*/
/*+--------+-----------+---------------------------------------------------+*/
/*| 0.01.63|22/Dec/2008|- delete mbdr_dsp_sdc_sync_with_cpu_read_sync_message|*/
/*+--------+-----------+---------------------------------------------------+*/
/*| 0.03.37|25/Feb/2010|- main_init_managers manages synchronization       |*/
/*|        |           |  process of DSP & host(if necessary)              |*/
/*+--------+-----------+---------------------------------------------------+*/
/*| 0.05.08|25/Dec/2011|- replace programmer name by code                  |*/
/*+--------+-----------+---------------------------------------------------+*/
/*                                                                          */
/* Function    : synchronization with CPU header file                        */

#include  "windef.h"
#include  "mbdr_dsp_common_config_multi_core.h"

#ifndef  _MBDR_DSP_SDC_SYNC_WITH_CPU_H
#define  _MBDR_DSP_SDC_SYNC_WITH_CPU_H

/* first stage of synchronization with cpu */
extern void mbdr_dsp_sdc_sync_with_cpu_do_init_0_2(
              mbdr_dsp_common_config_multi_core_t pi_dummy_config_multi_core);

/* second stage of synchronization with cpu */
extern void mbdr_dsp_sdc_sync_with_cpu_do_init_2_0(
              mbdr_dsp_common_config_multi_core_t pi_dummy_config_multi_core);


/* reads and update fpga pointers                                          */
/* In HW systems FPGA memory is FPGA memory, but in simulator since memory */
/* save reasons the gap between DRFM memory area is much smaller compare to*/
/* HW                                                                      */
extern void mbdr_dsp_sdc_sync_with_cpu_update_fpga_ptrs(void);

/* initialize internal peripherals */
extern void mbdr_dsp_sdc_internal_peripherals_init(void);

/*initialize mbdr_dsp_track_backlog_process_time*/
/*and set process times for each stage			*/
extern void mbdr_dsp_sdc_init_track_backlog_process_time(void);


#endif
