# pciePrefMemReg_s Struct Reference
[PCIE LLD Type1 (root) Register Definitions]

Specification of the Prefetchable Memory Limit and Base Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint16_t | limit
| [rw] Memory limit
uint8_t | limitAddr
| [rw] 32 or 64 bit addressing
uint16_t | base
| [rw] Memory base
uint8_t | baseAddr
| [rw] 32 or 64 bit addressing

## Detailed Description

Specification of the Prefetchable Memory Limit and Base Register.

## Field Documentation

uint16_t pciePrefMemReg_s::base

[rw] Memory base

Upper 12 bits of 32bit prefetchable memory base address (start address).

Field size: 12 bits

uint8_t pciePrefMemReg_s::baseAddr

[rw] 32 or 64 bit addressing

Indicates addressing for the prefetchable memory base address (start address).

0 = 32-bit memory addressing
1 = 64-bit memory addressing

Field size: 1 bit

uint16_t pciePrefMemReg_s::limit

[rw] Memory limit

Upper 12 bits of 32bit prefetchable memory limit address (end address).

Field size: 12 bits

uint8_t pciePrefMemReg_s::limitAddr

[rw] 32 or 64 bit addressing

Indicates addressing for prefetchable memory limit address (end address).

0 = 32-bit memory addressing
1 = 64-bit memory addressing

Field size: 1 bit

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated