/*                                                                          */
/* Function    : define   platform depend routines pointers                 */
/*                                                                          */
/*                                                                          */
/* Background:   In some platforms FPGA is real and in in other it is       */
/*               simulated, the same for CPU therefore each application     */
/*               supplies its own: 1) CPU/FPGA access routine pointers      */
/*                                 2) system synchronization routine pointer*/
/*                                                                          */

#include  "windef.h"
#include  "string.h"
#include  "mbdr_dsp_common_config_multi_core.h"

#ifndef __MBDR_DSP_PLATFORM_PROC_PTRS_H
#define __MBDR_DSP_PLATFORM_PROC_PTRS_H


/* access routines to external devices, these pointers are CPU */
/* independent                                                 */
typedef struct
{
  void* (*cpu_write_memcpy)     (void *,      const void *, USHORT, USHORT);
  void  (*cpu_write_dw)         (LONG  pi_dw, LONG *po_dst_p, USHORT);
}mbdr_dsp_platform_external_io_access_proc_ptrs_t;

/* these structure is initialiazed by user upon system init */
extern mbdr_dsp_platform_external_io_access_proc_ptrs_t
                  mbdr_dsp_platform_external_io_access_proc_ptrs;

/* each system has its own modes table */
extern mbdr_dsp_platform_external_io_access_proc_ptrs_t
                  mbdr_dsp_platform_external_io_access_proc_ptrs_tbl[];

/* internal process/initialization/ procedures pointers which are  */
/* core depend only                                                */
typedef struct
{

  /* init stage 0_2 */
  void (*init_0_2)(
                  mbdr_dsp_common_config_multi_core_t pi_config_multi_core);

  /* init stage 2_0 */
  void (*init_2_0)(mbdr_dsp_common_config_multi_core_t pi_config_multi_core);


  /* application main loop initialization, called wne time before  */
  /* infinite kernel call                                          */
  void (*main_loop_init)(
                   mbdr_dsp_common_config_multi_core_t pi_config_multi_core);

  /* main loop kernel till application stop request through            */
  /*  condition _config[0].common.re_synchronization_request           */
  void (*main_loop_kernel)(
                   mbdr_dsp_common_config_multi_core_t pi_config_multi_core);


}mbdr_dsp_core_process_proc_ptrs_t;

/* these structure is initialiazed by user upon system init */
extern mbdr_dsp_core_process_proc_ptrs_t
                     mbdr_dsp_core_process_proc_ptrs;

/* each system has its own modes table */
extern mbdr_dsp_core_process_proc_ptrs_t
                     mbdr_dsp_core_process_proc_ptrs_tbl[];


/* system simulation/ monitor procedures pointers which are both  */
/* both core & platform depend, in full real target they are NULL */
typedef struct
{
  void  (*host_wake_up)(void);
  //void  (*host_sync_with_dsp_work_0_1)(void);
  void  (*host_sync_with_dsp_work_1_0)(void);
  void  (*host_write_mission_to_dsp)(void);
  void  (*host_write_cpu_state_number)(SHORT pi_next_cpu_state);
  void  (*host_poll_dsp_state_number)(SHORT pi_next_dsp_state);
  void  (*dsp_initialize_print_stream)(void);

  /* run time general purpose hook, used for hw/host simulation */
  void  (*dsp_main_loop_kernel_debug_hook)(void);
  
  
  /* write to file */
  void  (*print_prob_dw_buf)(const void     *pi_buf_p,
                             int             pi_buf_byte_size,
                             volatile LONG  *po_prob_fp);
  
  
}mbdr_dsp_platform_core_debug_proc_ptrs_t;

/* these structure is initialiazed by mbdr_dsp_common_main_init_manager       */
/* whch simply copy relevent entry from mbdr_dsp_platform_core_debug_proc_tbl */
extern mbdr_dsp_platform_core_debug_proc_ptrs_t
                     mbdr_dsp_platform_core_debug_proc_ptrs;

/* these table is initilized by user upon calling to          */
/* multi_core_platform_init_hook_proc_p, up to dsp core index */
extern mbdr_dsp_platform_core_debug_proc_ptrs_t
                     mbdr_dsp_platform_core_debug_proc_tbl[];


/* constant value till PCI driver is being built */
#define MBDR_DSP_FPGA_TEMPORARY_MEMCPY_CODE 0
#define MBDR_DSP_CPU_TEMPORARY_MEMCPY_CODE 0

#endif
