# hyplnkIntPriVecReg_s Struct Reference
[HYPLNK LLD Register Definitions]

Specification of the Hyperlink Interrupt Priority Vector Status/Clear Register. More...

`#include <hyplnk.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint8_t | noIntPend
| [ro] 1 indicates NO interrupts are in hyplnkIntStatusClrReg_s
uint8_t | intStat
| [rw] Interrupt Priority Vector Status

## Detailed Description

Specification of the Hyperlink Interrupt Priority Vector Status/Clear Register.

When read, the Interrupt Priority Vector Status/Clear register displays the highest priority vector with a pending interrupt. When writing, only intStat is valid, and the value represents the vector of the interrupt to be cleared.

## Field Documentation

uint8_t hyplnkIntPriVecReg_s::intStat

[rw] Interrupt Priority Vector Status

Field size: 5 bits

When read, this field displays the vector that is mapped to the highest priority interrupt bit that is pending from hyplnkIntStatusClrReg_s, with Bit 0 as the highest priority, and Bit 31 as the lowest. Writing back the vector value into this field will clear the interrupt.

uint8_t hyplnkIntPriVecReg_s::noIntPend

[ro] 1 indicates NO interrupts are in hyplnkIntStatusClrReg_s

Field size: 1 bit [ro] 1 indicates NO interrupts are in hyplnkIntStatusClrReg_s

The documentation for this struct was generated from the following file:

- hyplnk.h

Copyright 2012, Texas Instruments Incorporated