# pcieAccrReg_s Struct Reference
[PCIE LLD Extended Capabilities Register Definitions]

Specification of the Advanced capabilities and control Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint8_t | chkEn
| [rw] ECRC Check Enable
uint8_t | chkCap
| [rw] ECRC Check Capable
uint8_t | genEn
| [rw] ECRC Generation Enable
uint8_t | genCap
| [rw] ECRC Generation Capability
uint8_t | erPtr
| [rw] First Error Pointer

## Detailed Description

Specification of the Advanced capabilities and control Register.

This register may be used for both endpoint and root complex modes.

## Field Documentation

uint8_t pcieAccrReg_s::chkCap

[rw] ECRC Check Capable

Field size: 1 bit

uint8_t pcieAccrReg_s::chkEn

[rw] ECRC Check Enable

Field size: 1bit

uint8_t pcieAccrReg_s::erPtr

[rw] First Error Pointer

The First Error Pointer is a field that identifies the bit position of the first error reported in the pcieUncErrReg_s

Field size: 5 bits

uint8_t pcieAccrReg_s::genCap

[rw] ECRC Generation Capability

Field size: 1 bit

uint8_t pcieAccrReg_s::genEn

[rw] ECRC Generation Enable

Field size: 1 bit

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated