# pcieSlotStatCtrlReg_s Struct Reference
[PCIE LLD Capabilities Register Definitions]

Specification of the Slot Status and Control register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | dllState
| [rw] Data Link Layer State Changed
uint8_t | emLock
| [ro] Electromechanical Lock Status
uint8_t | presenceDet
| [ro] Presence Detect State
uint8_t | mrlState
| [ro] MRL Sensor State
uint8_t | cmdComplete
| [rw] Command Completed
uint8_t | presenceChg
| [rw] Presence Detect Changed
uint8_t | mrlChange
| [rw] MRL Sensor Changed
uint8_t | pwrFault
| [rw] Power Fault Detected
uint8_t | attnPressed
| [rw] Attention Button Pressed.
uint8_t | dllChgEn
| [rw] Data Link Layer State Changed Enable.
uint8_t | emLockCtl
| [rw] Electromechanical Interlock Control.
uint8_t | pmCtl
| [rw] Power Controller Control
uint8_t | pmIndCtl
| [rw] Power Indicator Control
uint8_t | attnIndCtl
| [rw] Attention Indicator Control.
uint8_t | hpIntEn
| [rw] Hot Plug Interrupt Enable.
uint8_t | cmdCmpIntEn
| [rw] Command Completed Interrupt Enable.
uint8_t | prsDetChgEn
| [rw] Presence Detect Changed Enable.
uint8_t | mrlChgEn
| [rw] MRL Sensor Changed Enable.
uint8_t | pwrFltDetEn
| [rw] Power Fault Detected Enable.
uint8_t | attnButtEn
| [rw] Attention Button Pressed Enable.

## Detailed Description

Specification of the Slot Status and Control register.

This register may only be used for root complex mode.

## Field Documentation

uint8_t pcieSlotStatCtrlReg_s::attnButtEn

[rw] Attention Button Pressed Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::attnIndCtl

[rw] Attention Indicator Control.

Field size: 2 bits

uint8_t pcieSlotStatCtrlReg_s::attnPressed

[rw] Attention Button Pressed.

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::cmdCmpIntEn

[rw] Command Completed Interrupt Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::cmdComplete

[rw] Command Completed

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::dllChgEn

[rw] Data Link Layer State Changed Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::dllState

[rw] Data Link Layer State Changed

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::emLock

[ro] Electromechanical Lock Status

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::emLockCtl

[rw] Electromechanical Interlock Control.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::hpIntEn

[rw] Hot Plug Interrupt Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::mrlChange

[rw] MRL Sensor Changed

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::mrlChgEn

[rw] MRL Sensor Changed Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::mrlState

[ro] MRL Sensor State

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::pmCtl

[rw] Power Controller Control

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::pmIndCtl

[rw] Power Indicator Control

Field size: 2 bits

uint8_t pcieSlotStatCtrlReg_s::presenceChg

[rw] Presence Detect Changed

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::presenceDet

[ro] Presence Detect State

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::prsDetChgEn

[rw] Presence Detect Changed Enable.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::pwrFault

[rw] Power Fault Detected

Write 1 to clear.

Field size: 1 bit

uint8_t pcieSlotStatCtrlReg_s::pwrFltDetEn

[rw] Power Fault Detected Enable.

Field size: 1 bit

uint32_t pcieSlotStatCtrlReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated