# pciePmRstIrqEnableClrReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the Power Management and Reset Interrupt Enable Clear Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | linkRstReq
| [rw] set to disable the Link Request Reset interrupt
uint8_t | pmPme
| [rw] set to disable the Power management PME message received interrupt
uint8_t | pmToAck
| [rw] set to disable the Power mangement ACK received interrupt
uint8_t | pmTurnoff
| [rw] set to disable the Power management turnoff messages received interrupt

## Detailed Description

Specification of the Power Management and Reset Interrupt Enable Clear Register.

## Field Documentation

uint8_t pciePmRstIrqEnableClrReg_s::linkRstReq

[rw] set to disable the Link Request Reset interrupt

Field size: 1 bit

uint8_t pciePmRstIrqEnableClrReg_s::pmPme

[rw] set to disable the Power management PME message received interrupt

Field size: 1 bit

uint8_t pciePmRstIrqEnableClrReg_s::pmToAck

[rw] set to disable the Power mangement ACK received interrupt

Field size: 1 bit

uint8_t pciePmRstIrqEnableClrReg_s::pmTurnoff

[rw] set to disable the Power management turnoff messages received interrupt

Field size: 1 bit

uint32_t pciePmRstIrqEnableClrReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated