# pciePriorityReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the Transaction Priority Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint8_t | mstPriv
| [rw] Master PRIV value on master transactions
uint8_t | mstPrivID
| [rw] Master PRIVID value on master transactions
uint8_t | mstPriority
| [rw] Priority level for each inbound transaction on the internal master port

## Detailed Description

Specification of the Transaction Priority Register.

## Field Documentation

uint8_t pciePriorityReg_s::mstPriority

[rw] Priority level for each inbound transaction on the internal master port

Field size: 3 bits

uint8_t pciePriorityReg_s::mstPriv

[rw] Master PRIV value on master transactions

Field size: 1 bits

uint8_t pciePriorityReg_s::mstPrivID

[rw] Master PRIVID value on master transactions

Field size: 4 bits

uint32_t pciePriorityReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated