# Srio_AppManagedCfg Struct Reference
[SRIO LLD Data Structures]

The structure describes the application managed configuration. More...

`#include <srio_drv.h>`

## Data Fields

uint16_t | bIsRxFlowCfgValid
| Boolean flag which indicates if the SRIO driver instance being configured should support receive or not? If this flag is set to 0 the Receive Flow configuration below is ignored which implies that the the receive flow is not configured and thus the driver instance and any associated sockets opened on this instance are no longer capable of receiving any data.
Cppi_RxFlowCfg | rxFlowCfg
| The Receive Flow Configuration is exposed to the application. The Application specifies how flows need to be configured. This allows the applications complete control over the queues from where the buffer descriptors are removed when packets are received.
uint16_t | bIsAccumlatorCfgValid
| Boolean flag which indicates if the SRIO driver should configure the accumulator with the provided accumulator configuration or not. If this parameter is set to 0 the accumulator configuration below is ignored.
Qmss_AccCmdCfg | accCfg
| Accumulator Configuration is exposed to the application which allows the application to determine the parameters for programming the accumulator.
void(* | rawRxFreeDrvBuffer )(Srio_DrvBuffer hDrvBuffer)
| For RAW Sockets this is the receive cleanup API which needs to be provided by the application. This API is invoked by the driver to cleanup the buffer descriptor associated with the RAW socket. This parameter can be set to NULL if the application wishes to only operate on NORMAL sockets.
int16_t | txQueueNum
| Indicates the queue number to be used for TX. Using this parameter same TX queue can be used for multiple SRIO driver instances. This parameter needs to be set to either a valid queue number or QMSS_PARAM_NOT_SPECIFIED which indicates driver should allocate the next available queue.
int32_t | rxDescSize
| Receive Descriptor Size. This is required to invalidate cache on the receive side. If this is set to zero then invalidate will not take place e.g. in case of buffer descriptors that are allocated from L2 SARAM which don't need invalidation.
Srio_PktDma_Prio | srioPktDmaTxPrio
| SRIO priority level set in the TCHAN_SCHED_CFG_REGn registers. This value provides the SRIO PKTDMA TX DMA channels priority. The value is encoded as follows: 0 = HIGH PRIORITY, 1 = MEDIUM-HIGH PRIORITY, 2 = MEDIUM-LOW PRIO, 3 = LOW PRIORITY.

## Detailed Description

The structure describes the application managed configuration.

In this configuration the entire low level configuration is exposed to the application. Applications can specify the CPPI Receive Flows, QMSS Accumulator configuration. This configuration works only with RAW sockets.

## Field Documentation

Srio_PktDma_Prio Srio_AppManagedCfg::srioPktDmaTxPrio

SRIO priority level set in the TCHAN_SCHED_CFG_REGn registers. This value provides the SRIO PKTDMA TX DMA channels priority. The value is encoded as follows: 0 = HIGH PRIORITY, 1 = MEDIUM-HIGH PRIORITY, 2 = MEDIUM-LOW PRIO, 3 = LOW PRIORITY.

The priority order from the CDMA is in the reverse order from the SRIO. Thus, "0" maps to "3", "1" to "2", "2" to "1" and "3" to "0". The inversed priority level (3 --> 0, 2 --> 1 etc.) is copied to the TX_QUEUE_SCH_INFOx register and used by the SRIO IP when forming SRIO headers.

The documentation for this struct was generated from the following file:

- srio_drv.h

Copyright 2012, Texas Instruments Incorporated