# pcieMsiLo32Reg_s Struct Reference
[PCIE LLD Message Signaled Interrupt Capabilities Register Definitions]

Specification of the MSI lower 32 bits Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint32_t | addr
| [rw] Lower 32bits address

## Detailed Description

Specification of the MSI lower 32 bits Register.

This register may be used for both endpoint and root complex modes.

## Field Documentation

uint32_t pcieMsiLo32Reg_s::addr

[rw] Lower 32bits address

Field size: 30 bits

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated