# pcieType1MemspaceReg_s Struct Reference
[PCIE LLD Type1 (root) Register Definitions]

Specification of the Memory Limit and Base Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint16_t | limit
| [rw] Upper 12 bits of 32bit Memory Limit Address.
uint16_t | base
| [rw] Upper 12 bits of 32bit Memory Base Address.

## Detailed Description

Specification of the Memory Limit and Base Register.

## Field Documentation

uint16_t pcieType1MemspaceReg_s::base

[rw] Upper 12 bits of 32bit Memory Base Address.

Field size: 12 bit

uint16_t pcieType1MemspaceReg_s::limit

[rw] Upper 12 bits of 32bit Memory Limit Address.

Field size: 12 bits

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated