# pcieIntPinReg_s Struct Reference
[PCIE LLD Type0 (endpoint) Register Definitions]

Specification of the Interrupt Pin Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
| [ro] Raw image of register on read; actual value on write
uint8_t | intPin
| [ro] interrupt Pin
uint8_t | intLine
| [rw] interrupt line

## Detailed Description

Specification of the Interrupt Pin Register.

## Field Documentation

uint8_t pcieIntPinReg_s::intLine

[rw] interrupt line

Field size: 8 bits

uint8_t pcieIntPinReg_s::intPin

[ro] interrupt Pin

It identifies the legacy interrupt message that the device uses. For single function configuration, the core only uses INTA.

intPin | Legacy Interrupt
--- | ---
0 | none
1 | INTA
2 | INTB
3 | INTC
4 | INTD
others | reserved

Field size: 8 bits

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated