# pcieMsiIrqReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the MSI Interrupt IRQ Register. More...

`#include <pcie.h>`

## Data Fields

uint32_t | raw
uint32_t | msiIrq
| [rw] To generate MSI Interrupt 0, the EP should write 0x0000_0000 to this register.

## Detailed Description

Specification of the MSI Interrupt IRQ Register.

## Field Documentation

uint32_t pcieMsiIrqReg_s::msiIrq

[rw] To generate MSI Interrupt 0, the EP should write 0x0000_0000 to this register.

Field size: 32 bits

uint32_t pcieMsiIrqReg_s::raw

[ro] Raw image of register on read; actual value on write

The documentation for this struct was generated from the following file:

- pcie.h

Copyright 2012, Texas Instruments Incorporated