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| _EMAC_AddrConfig | MAC addresses configuration Structure |
| _EMAC_ChannelInfo | Transmit/Receive Channel info Structure |
| _EMAC_Common_Config | EMAC_Common_Config |
| _EMAC_Config | EMAC_Config |
| _EMAC_Core | EMAC Core Instance Structure |
| _EMAC_Core_Config | EMAC_Core_Config |
| _EMAC_DescCh | Transmit/Receive Descriptor Channel Structure |
| _EMAC_Device | EMAC Main Device Instance Structure |
| _EMAC_Pkt | EMACObjects EMAC Objects |
| _EMAC_Statistics | EMAC_Statistics |
| _EMAC_Status | EMAC_Status |
| _MDIO_Device | MDIO_Device This is the MDIO object that contains the MDIO device object characteristics |
| _pktq | Packet Queue |
| CSL_BWMNGMT_CPUARB_SETUP | CSL_BWMNGMT_CPUARB_SETUP has all the fields required to configure the CPU Arbitration Control Register of BWMNGMT for any given memory control block (L1D/L2/EMC) |
| CSL_BWMNGMT_MDMAPRI_SETUP | CSL_BWMNGMT_MDMAPRI_SETUP has all the fields required to configure Master DMA (MDMA) Arbitration Control Register of BWMNGMT for L2/UMC memory control block |
| CSL_Edma3ActivityStat | Edma Channel Controller Activity Status |
| CSL_Edma3CfgInfo | EDMA3 Configuration Information This describes the configuration information for each EDMA instance. This is populated by the SOC layer for each instance |
| CSL_Edma3ChannelAttr | Edma Channel parameter structure used for opening a channel |
| CSL_Edma3ChannelErr | Edma Channel Error |
| CSL_Edma3ChannelObj | Edma Object Structure |
| CSL_Edma3CmdDrae | Edma Command Structure for setting region specific attributes |
| CSL_Edma3CmdIntr | Edma Control/Query Control Command structure for issuing commands for Interrupt related APIs An object of this type is allocated by the user and its address is passed to the Control API |
| CSL_Edma3CmdQrae | Edma Control/Query Command Structure for querying qdma region access enable attributes |
| CSL_Edma3CmdQuePri | Edma Command Structure used for setting Event Que priority level |
| CSL_Edma3CmdQueThr | Edma Command Structure used for setting Event Que threshold level |
| CSL_Edma3CmdRegion | Edma Control/Query Command Structure for querying region specific attributes |
| CSL_Edma3CtrlErrStat | Edma Controller Error Status |
| CSL_Edma3HwDmaChannelSetup | QDMA Edma Channel Setup |
| CSL_Edma3HwQdmaChannelSetup | QDMA Edma Channel Setup |
| CSL_Edma3HwSetup | Edma Hw Setup Structure |
| CSL_Edma3MemFaultStat | Edma Memory Protection Fault Error Status |
| CSL_Edma3ModuleBaseAddress | This will have the base-address information for the module instance |
| CSL_Edma3Obj | This object contains the reference to the instance of Edma Module opened using the CSL_edma3Open() |
| CSL_Edma3ParamSetup | Edma ParamSetup Structure |
| CSL_Edma3QueryInfo | Edma Controller Information |
| CSL_Edma3QueStat | Edma Controller Que Status |
| CSL_IDMA_IDMA0CONFIG | This structure holds the information required to initiate a iDMA Channel 0 Configuration(CFG) space Transfer request from the GEM |
| CSL_IDMA_IDMA1CONFIG | This structure holds the information required to initiate a iDMA Channel 1 Block Fill/Transfer request in the GEM |
| CSL_IDMA_STATUS | This structure holds the information required to interpret the IDMA Channel 0/1 Transfer Status |
| CSL_IntcContext | |
| CSL_IntcDropStatus | |
| CSL_IntcEventHandlerRecord | |
| CSL_IntcObj | |
| CSL_MEMPROT_MPFSR | This will be used to query the memory fault status |
| CSL_MEMPROT_MPLKSTAT | This will be used to lock/unlock/reset a memory region |
| CSL_MEMPROT_MPPA | This will be used to set/query the memory page attributes |
| CSL_TmrBaseAddress | This structure contains the base-address information for the peripheral instance |
| CSL_TmrConfig | Config-structure Used to configure the GP timer using CSL_tmrHwSetupRaw() |
| CSL_TmrContext | Module specific context information. Present implementation of GP timer CSL doesn't have any context information |
| CSL_TmrHwSetup | Hardware setup structure |
| CSL_TmrObj | Watchdog timer object structure |
| CSL_TmrParam | Module specific parameters. Present implementation of GP timer CSL doesn't have any module specific parameters |
| CSL_XMC_MPFSR | This is the definition of CSL_XMC_MPFSR |
| CSL_XMC_XMPAXH | This is the definition of CSL_XMC_XMPAXH |
| CSL_XMC_XMPAXL | This is the definition of CSL_XMC_XMPAXL |
| CSL_XMC_XPFADDR | This is the definition of CSL_XMC_XPFADDR |
| EMIF4_ECC_CONTROL | ECC Control |
| EMIF4_MSTID_COS_MAPPING | Master ID to COS Mapping |
| EMIF4_PRI_COS_MAPPING | Priority to COS Mapping |
| EMIF4F_IODFT_CONTROL | IODFT Control Values |
| EMIF4F_LPDDR2NVM_TIMING_CONFIG | LPDDR2-NVM Timing Configuration |
| EMIF4F_OUTPUT_IMP_CONFIG | SDRAM Output Impedance Calibration Configuation |
| EMIF4F_PERF_CONFIG | Performance Counter Configuration |
| EMIF4F_PWR_MGMT_CONFIG | Power Management Configuration |
| EMIF4F_SDRAM_CONFIG | EMIF4F SDRAM Configuration |
| EMIF4F_TEMP_ALERT_CONFIG | Temperature Alert Configuration |
| EMIF4F_TIMING1_CONFIG | EMIF4F Timing1 Configuration |
| EMIF4F_TIMING2_CONFIG | EMIF4F Timing2 Configuration |
| EMIF4F_TIMING3_CONFIG | EMIF4F Timing3 Configuration |
| EMIF4F_VBUS_CONFIG_VALUE | VBUS Configuration Values |
| SGMII_Config | |
| SGMII_Status | |
| SRIO_AMU_PANE | SRIO AMU Pane |
| SRIO_AMU_WINDOW | SRIO AMU Window |
| SRIO_ERR_RATE | SRIO Error Rate |
| SRIO_LANE_STATUS | SRIO Lane Status |
| SRIO_LSU_TRANSFER | SRIO LSU Transfer |
| SRIO_MESSAGE | SRIO Message Description |
| SRIO_OP_CAR | SRIO Operation Capability Register |
| SRIO_PE_FEATURES | SRIO Processing Element Features |
| SRIO_PLM_CONTROL_SYMBOL | SRIO PLM Control Symbol Configuration |
| SRIO_PLM_IMPL_CONTROL | SRIO Lane Status |
| SRIO_PLM_POLARITY_CONTROL | SRIO PLM Polarity Control |
| SRIO_PLM_VMIN_EXPONENT | SRIO PLM VMin Exponent |
| SRIO_TLM_CONTROL | SRIO TLM Control Configuration |
| SRIO_TYPE9_MESSAGE | SRIO Type 9 Message Description |
| VCP2_BaseParams | |
| VCP2_ConfigIc | |
| VCP2_Errors | |
| VCP2_Params | |
| VCP2_PID | |
| VCP2_Poly | |
| VCP2BaseAddress | |
| VCP2Obj |